An Efficient Implementation Approach to FFT Processor for Spectral Analysis

J Hazarika, MT Khan, SR Ahamed… - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
This article presents an efficient hardware implementation approach to a variable-size fast
Fourier transform (FFT) processor for spectral analysis. Due to its capability to handle …

Weighted partitioning for fast multiplierless multiple-constant convolution circuit

GD Licciardo, C Cappetta… - IEEE Transactions on …, 2016 - ieeexplore.ieee.org
A new radix-3 partitioning method of natural numbers, derived by the weight partition theory,
is employed to build a multiplierless circuit that is well suited for multimedia filtering …

[HTML][HTML] Structure and Principles of Operation of a Quaternion VLSI Multiplier

A Cariow, M Naumowicz, A Handkiewicz - Applied Sciences, 2024 - mdpi.com
The paper presents the original structure of a processing unit for multiplying quaternions.
The idea of organizing the device is based on the use of fast Hadamard transform blocks …

Integer linear programming-based bit-level optimization for high-speed FIR decimation filter architectures

A Blad, O Gustafsson - Circuits, Systems and Signal Processing, 2010 - Springer
Analog-to-digital converters based on sigma-delta modulation have shown promising
performance, with steadily increasing bandwidth. However, associated with the increasing …

[PDF][PDF] Flexible baseband transmitter for OFDM

F Kristensen, P Nilsson, A Olsson - Proc. IASTED conf. Circuits …, 2003 - researchgate.net
To fully utilize the available spectrum for a wireless communication system it is feasible to
adapt to different situations on the channel. In this paper a flexible OFDM transmitter is …

[PDF][PDF] Butterfly unit supporting radix-4 and radix-2 FFT

J Takala, K Punkka - Proceedings of The 2005 International TICSP …, 2005 - academia.edu
This paper considers partial-column radix-2 and radix-2/4 FFT processors and realizations
of butterfly operations. The proposed processor organization allows the area of the FFT …

Scalable FFT processors and pipelined butterfly units

J Takala, K Punkka - Journal of VLSI signal processing systems for signal …, 2006 - Springer
This paper considers partial-column radix-2 FFT processors and realizations of butterfly
operations. The area and power-efficiency of butterfly units to be used in the proposed …

Distributed arithmetic based split-radix FFT

SP Joshi, R Paily - Journal of Signal Processing Systems, 2014 - Springer
In this paper we have designed a Split-radix type FFT unit without using multipliers. All the
complex multiplications required for this type of FFT are implemented using Distributed …

Split radix multiplication

A Berkeman - US Patent 7,318,080, 2008 - Google Patents
BACKGROUND The present invention relates to automated multiplication, and more
particularly to efficient automated multiplication that is especially well suited for multiplication …

A generic transmitter for wireless OFDM systems

F Kristensen, P Nilsson, A Olsson - 14th IEEE Proceedings on …, 2003 - ieeexplore.ieee.org
To fully utilize the available spectrum for a wireless communication system it is feasible to
adapt to different situations on the channel as well as different systems with various quality …