This is a book for engineers concerned with jitter: the e ects of noise visible in the time
domain. The material presented will be helpful for work at both the system level and the …

(57) ABSTRACT A gated Voltage controlled oscillator has four identically structured delay
cells, each of the delay cells having the same output load by connecting to the same number …

Burst-mode clock and data recovery circuits (BMCDR) are widely used in passive optical
networks (PON)[1] and as a replacement for conventional CDRs in clock-forwarding links to …

A 1.296-to-5.184 Gb/s transceiver with 2.4 mW/(Gb/s) burst-mode CDR using a dual-edge
injection-locked oscillator is fabricated in 40 nm CMOS. The chip operates over a range of …

This paper presents a fast-locking 28 Gbaud PAM-4 CDR targeting for burst-mode
operation. By implementing an oversampling scheme tailored for the preamble stage signal …

Abstract Systems and methods for automatic detection and compensation of frequency offset
in point-to-point communication. A burst mode clock and data recovery (CDR) system …

This paper proposes an all digital CMOS phase interpolator suitable for high-speed multi-
Gigabit serial interfaces. The topology is based on the parallel combination of identical …

A multi-rate burst-mode clock and data recovery (BCDR) circuit based on a simple gated
voltage-controlled oscillator (GVCO) is presented. A simple symmetric circuit topology …

A burst mode clock and data recovery (BMCDR) circuit for 10 Gbps passive optical network
(10G-PON) is presented. The proposed BMCDR is reconfigurable between data gating …

Capital markets react promptly and significantly to critical events that have not been
anticipated by market participants. Prominent examples of such market behaviour which risk …