Energy-efficient computing at cryogenic temperatures
Increasing demand for data-intense computing applications—such as artificial intelligence,
large language models and high-performance computing—has created a need for …
large language models and high-performance computing—has created a need for …
A Benchmark of Cryo-CMOS Embedded SRAM/DRAMs in 40-nm CMOS
RA Damsteegt, RWJ Overwater… - IEEE Journal of Solid …, 2024 - ieeexplore.ieee.org
The interface electronics needed for quantum processors require cryogenic CMOS (cryo-
CMOS) embedded digital memories covering a wide range of specifications. To identify the …
CMOS) embedded digital memories covering a wide range of specifications. To identify the …
Cooling the Chaos: Mitigating the Effect of Threshold Voltage Variation in Cryogenic CMOS Memories
Cryogenic CMOS is a promising technology for high performance computing due to its
improvement in subthreshold slope, carrier mobilities and reduced wire resistance. The …
improvement in subthreshold slope, carrier mobilities and reduced wire resistance. The …
Design and Characterization of a 6-mW Cryogenic SiGe IC for Superconducting Qubit Readout
In this article, a cryogenically cooled SiGe BiCMOS integrated circuit is described and used
to achieve 98% readout fidelity when measuring the state of a superconducting transmon …
to achieve 98% readout fidelity when measuring the state of a superconducting transmon …
Cryogenic In-Memory Computing for Quantum Processors Using Commercial 5nm FinFETs
Cryogenic CMOS circuits that efficiently connect the classical domain with the quantum
world are the cornerstone in bringing large-scale quantum processors to reality. The major …
world are the cornerstone in bringing large-scale quantum processors to reality. The major …
Overview of Cryo-CMOS Devices and Circuits for Quantum Computing Applications
RR Manikandan - 2023 IEEE International Symposium on …, 2023 - ieeexplore.ieee.org
A fault tolerant scalable quantum computer requires more than 1000 Qubits to perform real
time state correction and to improve the Qubit coherence time. The dense wiring …
time state correction and to improve the Qubit coherence time. The dense wiring …
Cryogenic Temperature Effects on 16nm FinFet Performance and Mismatch
We present a full electrical characterization of a commercial 16 nm FinFet technology
conducted at six different temperatures, from 300 K to 4.2 K. First, we explore the electrical …
conducted at six different temperatures, from 300 K to 4.2 K. First, we explore the electrical …
A Comprehensive Vmin Characterization of 5 nm FinFET-based SRAM at Cryogenic Temperatures
In this article, for the first time, we present a comprehensive study of the impact of cryogenic
temperatures on the minimum-operating voltage (V min) of 5 nm Fin Field-Effect Transistors …
temperatures on the minimum-operating voltage (V min) of 5 nm Fin Field-Effect Transistors …