CMOS utilizing high mobility III-V/Ge channels on Si substrates is expected to be one of the
promising devices for high performance and low power integrated systems in the future …

Ultrasmall-scale semiconductor devices (≤ 5 nm) are advancing technologies, such as
artificial intelligence and the Internet of Things. However, the further scaling of these devices …

For realizing Ge CMOS devices with a small equivalent oxide thickness (EOT) and a low
density of fast interface states (D it), understanding of slow traps in Ge gate stacks and …

We demonstrate a Si-passivated Ge nMOS gate stack with D IT of~ 5× 10 10 cm-2 eV-1
around midgap and unnoticeable CV hysteresis at an operating condition (oxide trap density …

The realization of Ge gate stacks with a small amount of slow trap density as well as thin
equivalent oxide thickness and low interface state density (D it) is a crucial issue for Ge …

A border trap (BT) evaluation method was established for SiO 2/GeO 2/Ge gate stacks by
using deep-level transient spectroscopy with a lock-in integrator. Ge metal-oxide …

In this letter, we have fabricated Ge-on-insulator (Ge-OI) junctionless (JL) n-MOSFETs via
wafer bonding and epitaxial lift-off (ELO) techniques. We have evaluated the electrical …

Ge metal-oxide-semiconductor (MOS) capacitor with HfLaON/(NbON/Si) stacked gate
dielectric and fluorine-plasma treatment is fabricated, and its interfacial and electrical …

For realizing of Ge complementary metal-oxide-semiconductor with a Ge gate stack with thin
equivalent oxide thickness, low interface state density (D it) and high reliability. In this paper …

The mobility scattering mechanisms in the ultra-thin-body (UTB) Ge-OI p-and n-MOSFETs
have been systematically investigated. It is found that the dependence is confirmed for the …