Testability and dependability of AI hardware: Survey, trends, challenges, and perspectives

F Su, C Liu, HG Stratigopoulos - IEEE Design & Test, 2023 - ieeexplore.ieee.org
Hardware realization of artificial intelligence (AI) requires new design styles and even
underlying technologies than those used in traditional digital processors or logic circuits …

A systematic literature review on hardware reliability assessment methods for deep neural networks

MH Ahmadilivani, M Taheri, J Raik… - ACM Computing …, 2024 - dl.acm.org
Artificial Intelligence (AI) and, in particular, Machine Learning (ML), have emerged to be
utilized in various applications due to their capability to learn how to solve complex …

Understanding and mitigating hardware failures in deep learning training systems

Y He, M Hutton, S Chan, R De Gruijl… - Proceedings of the 50th …, 2023 - dl.acm.org
Deep neural network (DNN) training workloads are increasingly susceptible to hardware
failures in datacenters. For example, Google experienced" mysterious, difficult to identify …

[PDF][PDF] Optimizing Selective Protection for CNN Resilience.

A Mahmoud, SKS Hari, CW Fletcher, SV Adve, C Sakr… - ISSRE, 2021 - ma3mool.github.io
As CNNs are being extensively employed in high performance and safety-critical
applications that demand high reliability, it is important to ensure that they are resilient to …

Structural coding: A low-cost scheme to protect cnns from large-granularity memory faults

A Asgari Khoshouyeh, F Geissler, S Qutub… - Proceedings of the …, 2023 - dl.acm.org
The advent of High-Performance Computing has led to the adoption of Convolutional Neural
Networks (CNNs) in safety-critical applications such as autonomous vehicles. However …

Saffira: a framework for assessing the reliability of systolic-array-based dnn accelerators

M Taheri, M Daneshtalab, J Raik… - … on Design & …, 2024 - ieeexplore.ieee.org
Systolic array has emerged as a prominent archi-tecture for Deep Neural Network (DNN)
hardware accelerators, providing high-throughput and low-latency performance essen-tial …

[HTML][HTML] Techniques for detecting and masking faults in semantic segmentation applications

S Burel, A Evans, L Anghel - Microelectronics Reliability, 2024 - Elsevier
Semantic segmentation of images is essential for many applications including autonomous
driving and modern DNNs now achieve high accuracy. Automotive systems are safety …

FPGA Implementation of a Fault-Tolerant Fused and Branched CNN Accelerator With Reconfigurable Capabilities

RT Syed, Y Zhao, J Chen, M Andjelkovic… - IEEE …, 2024 - ieeexplore.ieee.org
The ImageNet moment was a turning point for Convolutional Neural Networks (CNNs), as it
demonstrated their potential to revolutionize computer vision tasks. This triumph of CNNs …

Analysis and Enhancement of Resilience for LSTM Accelerators using Residue-based CEDs

N Nosrati, Z Navabi - IEEE Access, 2024 - ieeexplore.ieee.org
As Long Short-Term Memory (LSTM) accelerators are increasingly being employed in safety-
critical applications with high-reliability demands, protecting them against errors becomes …

Dendrite-inspired Computing to Improve Resilience of Neural Networks to Faults in Emerging Memory Technologies

LK John, FMG França, S Mitra… - 2023 IEEE …, 2023 - ieeexplore.ieee.org
Mimicking biological neurons by focusing on the excitatory/inhibitory decoding performed by
dendritic trees offers an intriguing alternative to the traditional integrate-and-fire McCullogh …