T Chen, GL Zhang, B Yu, B Li… - IEEE Design & …, 2022 - ieeexplore.ieee.org
The increasing complexity and size of design space poses significant challenges for integrated circuit (IC) design. This article discusses the potential of machine learning (ML) …
K Kunal, T Dhar, M Madhusudan… - … on Computer-Aided …, 2023 - ieeexplore.ieee.org
Analog designs consist of multiple hierarchical functional blocks. Each block can be built using one of several design topologies, where the choice of topology is based on circuit …
SM Burns, H Chen, T Dhar, R Harjani, J Hu… - … Learning Applications in …, 2022 - Springer
The performance of analog circuits is critically dependent on layout parasitics, but layout has traditionally been a manual and time-consuming task. Recent advances in ML have enabled …
Q Xu, L Wang, J Wang, L Cheng… - IEEE Transactions on …, 2024 - ieeexplore.ieee.org
In recent years, analog circuits have received extensive attention and are widely used in many emerging applications. The high demand for analog circuits necessitates shorter …
T Dhar, S Ramprasath, J Poojary… - … , Automation & Test …, 2022 - ieeexplore.ieee.org
An analog/mixed-signal designer typically performs circuit optimization, involving intensive SPICE simulations, on a schematic netlist and then sends the optimized netlist to layout …
SS Sapatnekar - Proceedings of the 2023 International Symposium on …, 2023 - dl.acm.org
The ALIGN (Analog Layout, Intelligently Generated from Netlists) project [1, 2] is a joint university-industry effort to push the envelope of automated analog layout through a …
The quality of layouts generated by automated analog design have traditionally not been able to match those from human designers over a wide range of analog designs. The ALIGN …