(52) US Cl......................................... 710/240; 711/154 (57) ABSTRACT (58) Field of
Classification Search.................. 710/310, A method for addressing system latency within a …

A method for addressing system latency within a network system which includes providing a
network interface and moving data within each of the plurality of memory access channels …

A packet switch includes a pointer table for mapping locations in an input data buffer to
locations in an output data buffer. The processor generates an output data packet based on …

(57) ABSTRACT A network processing device stores and aligns data received from an input
port prior to forwarding the data to an output port. Data packets arrive at various input ports …

This invention relates to a Dynamic Random AcceSS Memory (DRAM) devices, more
particularly to logic tech nology based embedded DRAM devices. AS a Solution to the …

An integrated circuit 2 includes a plurality of transaction sources 6, 8, 10, 12, 14, 16, 18, 20
communicating via a ring-based interconnect 30 with shared caches 22, 24 each having an …

A method and apparatus for managing memory access requests have been disclosed. One
embodiment of the method includes dynamically modifying attributes of each of a number of …

US7353288B1 - SONET/SDH payload re-mapping and cross-connect - Google Patents
US7353288B1 - SONET/SDH payload re-mapping and cross-connect - Google Patents …

An exclusion controller which allows an information process ing unit to acquire a contended
resource to the exclusion of the other information processing units includes a plurality of non …

BACKGROUND Many different types of computing systems have attained widespread use
around the world. These computing systems include personal computers, servers …