[图书][B] Benchmarking modern multiprocessors

C Bienia - 2011 - search.proquest.com
Benchmarking has become one of the most important methods for quantitative performance
evaluation of processor and computer system designs. Benchmarking of modern …

The PARSEC benchmark suite: Characterization and architectural implications

C Bienia, S Kumar, JP Singh, K Li - Proceedings of the 17th international …, 2008 - dl.acm.org
This paper presents and characterizes the Princeton Application Repository for Shared-
Memory Computers (PARSEC), a benchmark suite for studies of Chip-Multiprocessors …

Review and evaluation of commonly-implemented background subtraction algorithms

Y Benezeth, PM Jodoin, B Emile… - 2008 19th …, 2008 - ieeexplore.ieee.org
Locating moving objects in a video sequence is the first step of many computer vision
applications. Among the various motion-detection techniques, background subtraction …

Transactional lock-free execution of lock-based programs

R Rajwar, JR Goodman - ACM SIGOPS Operating Systems Review, 2002 - dl.acm.org
This paper is motivated by the difficulty in writing correct high-performance programs. Writing
shared-memory multi-threaded programs imposes a complex trade-off between …

SafetyNet: Improving the availability of shared memory multiprocessors with global checkpoint/recovery

DJ Sorin, MMK Martin, MD Hill, DA Wood - ACM SIGARCH Computer …, 2002 - dl.acm.org
We develop an availability solution, called SafetyNet, that uses a unified, lightweight
checkpoint/recovery mechanism to support multiple long-latency fault detection schemes. At …

Variability in architectural simulations of multi-threaded workloads

AR Alameldeen, DA Wood - The Ninth International …, 2003 - ieeexplore.ieee.org
Multi-threaded commercial workloads implement many important Internet services.
Consequently, these workloads are increasingly used to evaluate the performance of …

ReVive: Cost-effective architectural support for rollback recovery in shared-memory multiprocessors

M Prvulovic, Z Zhang, J Torrellas - ACM SIGARCH Computer …, 2002 - dl.acm.org
This paper presents ReVive, a novel general-purpose rollback recovery mechanism for
shared-memory multiprocessors. ReVive carefully balances the conflicting requirements of …

Increasing the effectiveness of directory caches by deactivating coherence for private memory blocks

BA Cuesta, A Ros, ME Gómez, A Robles… - Proceedings of the 38th …, 2011 - dl.acm.org
To meet the demand for more powerful high-performance shared-memory servers,
multiprocessor systems must incorporate efficient and scalable cache coherence protocols …

Rerun: Exploiting episodes for lightweight memory race recording

DR Hower, MD Hill - ACM SIGARCH computer architecture news, 2008 - dl.acm.org
Multiprocessor deterministic replay has many potential uses in the era of multicore
computing, including enhanced debugging, fault tolerance, and intrusion detection. While …

Simflex: A fast, accurate, flexible full-system simulation framework for performance evaluation of server architecture

N Hardavellas, S Somogyi, TF Wenisch… - ACM SIGMETRICS …, 2004 - dl.acm.org
The new focus on commercial workloads in simulation studies of server systems has caused
a drastic increase in the complexity and decrease in the speed of simulation tools. The …