This survey provides an overview of the scientific literature on timing verification techniques
for multi-core real-time systems. It reviews the key results in the field from its origins around …

Multi-core devices are envisioned to support the development of next-generation safety-
critical systems, enabling the on-chip integration of functions of different criticality. This …

Microarchitectural timing channels expose hidden hardware states though timing. We survey
recent attacks that exploit microarchitectural features in shared hardware, especially as they …

DRAM consists of multiple resources called banks that can be accessed in parallel and
independently maintain state information. In Commercial Off-The-Shelf (COTS) multicore …

Given the increasingly complex and mixed-criticality nature of modern embedded systems,
virtualization emerges as a natural solution to achieve strong spatial and temporal isolation …

Latency-critical applications suffer from both average performance degradation and reduced
completion time predictability when collocated with batch tasks. Such variation forces the …

We present DeepPicar, a low-cost deep neural network based autonomous car platform.
DeepPicar is a small scale replication of a real self-driving car called DAVE-2 by NVIDIA …

Timing channels enable data leakage that threatens the security of computer systems, from
cloud platforms to smartphones and browsers executing untrusted third-party code …

Modern SoCs integrate multiple CPU cores and hardware accelerators (HWAs) that share
the same main memory system, causing interference among memory requests from different …

Prior work has identified several optimal algorithms for scheduling independent, implicit-
deadline sporadic (or periodic) real-time tasks on identical multiprocessors. These …