Modeling and estimation of process-induced stress in the nanowire field-effect-transistors (NW-FETs) on insulator-on-silicon substrates with high-k gate-dielectrics
S Chatterjee, S Chattopadhyay - Superlattices and Microstructures, 2016 - Elsevier
An analytical model including the simultaneous impact of lattice and thermo-elastic constant
mismatch-induced stress in nanowires on Insulator-on-Silicon substrate is developed. It is …
mismatch-induced stress in nanowires on Insulator-on-Silicon substrate is developed. It is …