Over the past decade, system-on-chip (SoC) designs have evolved to address the ever
increasing complexity of applications, fueled by the era of digital convergence …

The use of reduced-order models to describe a dynamical system is pervasive in science
and engineering. Often these models are used without an estimate of their error or range of …

A novel unified model, for conventional copper and futuristic multilayer graphene
nanoribbon (MLGNR) interconnects, based on a finite-difference time-domain (FDTD) …

The use of reduced-order models to describe a dynamical system is pervasive in science
and engineering. Often these models are used without an estimate of their error or range of …

Higher-level representations (macromodels, reduced-order models) abstract away
unnecessary implementation details and model only important system properties such as …

A two-dimensional mesh-connected processor array is an extensively investigated
architecture used in parallel processing. Massive studies have addressed the use of …

Techniques to determine subarrays when processing elements of VLSI arrays become faulty
have been investigated extensively. These tend to identify the largest subarray that is …

Automatic language identification is a natural language processing problem that tries to
determine the natural language of a given content. In this paper we present a statistical …

In this paper, the energy consumption of RC ladder networks, which can represent chains of
transmission gate or long wire interconnections, is modeled. Their energy dependence on …

In this paper, resistance-capacitance (RC) tree networks are modeled in terms of their
energy consumption associated with an input transition. This work significantly extends the …