Memory disaggregation promises transparent elasticity, high resource utilization and
hardware heterogeneity in data centers by physically separating memory and compute into …

Contemporary discrete GPUs support rich memory management features such as virtual
memory and demand paging. These features simplify GPU programming by providing a …

Processors and operating systems (OSes) support multiple memory page sizes. Superpages
increase Translation Lookaside Buffer (TLB) hits, while small pages provide fine-grained …

Translation lookaside buffer (TLB) caches virtual to physical address translation information
and is used in systems ranging from embedded devices to high‐end servers. Because TLB …

While emerging accelerator-centric architectures offer orders-of-magnitude performance and
energy improvements, use cases and adoption can be limited by their rigid programming …

The unabating growth of the memory needs of emerging datacenter applications has
exacerbated the scalability bottleneck of virtual memory. However, reducing the excessive …

To mitigate excessive TLB misses in large memory applications, techniques such as large
pages, variable length segments, and HW coalescing, increase the coverage of limited …

With increasing deployment of virtual machines for cloud services and server applications,
memory address translation overheads in virtualized environments have received great …

Virtual memory (VM) eases programming effort but can suffer from high address translation
overheads. Architects have traditionally coped by increasing Translation Lookaside Buffer …

Accelerators are increasingly recognized as one of the major drivers of future computational
growth. For accelerators, shared virtual memory (VM) promises to simplify programming and …