FPGA dynamic and partial reconfiguration: A survey of architectures, methods, and applications

K Vipin, SA Fahmy - ACM Computing Surveys (CSUR), 2018 - dl.acm.org
Dynamic and partial reconfiguration are key differentiating capabilities of field
programmable gate arrays (FPGAs). While they have been studied extensively in academic …

The TFOS International Workshop on Contact Lens Discomfort: report of the contact lens materials, design, and care subcommittee

L Jones, NA Brennan… - … & visual science, 2013 - iovs.arvojournals.org
Examining the role of the contact lens material, design, and the care system is fundamental
to understanding contact lens discomfort (CLD). However, a systematic review that tries to …

A high speed open source controller for FPGA partial reconfiguration

K Vipin, SA Fahmy - 2012 International Conference on Field …, 2012 - ieeexplore.ieee.org
Partial Reconfiguration (PR) is an advanced technique, which improves the flexibility of
FPGAs by allowing portions of a design to be reconfigured at runtime by overwriting parts of …

Towards dynamic and partial reconfigurable hardware architectures for cryptographic algorithms on embedded devices

A Alkamil, DG Perera - IEEE Access, 2020 - ieeexplore.ieee.org
In the era of IoT, embedded systems are becoming the cornerstone of many IoT related
applications, such as smart cars and wearable devices. However, embedded devices have …

Virtualized execution and management of hardware tasks on a hybrid ARM-FPGA platform

AK Jain, KD Pham, J Cui, SA Fahmy… - Journal of Signal …, 2014 - Springer
Emerging hybrid reconfigurable platforms tightly couple capable processors with high
performance reconfigurable fabrics. This promises to move the focus of reconfigurable …

Microkernel hypervisor for a hybrid ARM-FPGA platform

KD Pham, AK Jain, J Cui, SA Fahmy… - 2013 IEEE 24th …, 2013 - ieeexplore.ieee.org
Reconfigurable architectures have found use in a wide range of application domains, but
mostly as static accelerators for computationally intensive functions. Commodity computing …

Build automation and runtime abstraction for partial reconfiguration on Xilinx Zynq Ultrascale+

AR Bucknall, S Shreejith… - … Conference on Field …, 2020 - ieeexplore.ieee.org
Partial reconfiguration (PR) is fundamental to building adaptive systems on modern FPGA
SoCs, where hardware can be adapted dynamically at runtime. Vendor supported …

Dynamic partial reconfigurable hardware architecture for principal component analysis on mobile and embedded devices

SN Shahrouzi, DG Perera - EURASIP Journal on Embedded Systems, 2017 - Springer
With the advancement of mobile and embedded devices, many applications such as data
mining have found their way into these devices. These devices consist of various design …

A heterogeneous multicore system on chip with run-time reconfigurable virtual FPGA architecture

M Hubner, P Figuli, R Girardey… - … on Parallel and …, 2011 - ieeexplore.ieee.org
System design, especially for low power embedded applications often profit from a
heterogeneous target hardware platform. The application can be partitioned into modules …

Dynamic and partial reconfiguration of Zynq 7000 under Linux

M Al Kadi, P Rudolph, D Gohringer… - … Computing and FPGAs …, 2013 - ieeexplore.ieee.org
Dynamic and partial reconfiguration is a well-known technique to update the configuration of
a field programmable gate array (FPGA) at runtime. Xilinx FPGAs support this feature which …