Digital Prototype Filter Alternatives for Processing Frequency-Stacked Mobile Subbands Deploying a Single Adc for Beamforming Satellites

A Coskun, S Cetinsel, I Kale, R Hughes… - … on Aerospace and …, 2023 - ieeexplore.ieee.org
This article presents a two-stage approach for the processing of frequency-stacked mobile
subbands. The frequency stacking is performed in the analog domain to enable the use of a …

[图书][B] DSP system design: Complexity reduced IIR filter implementation for practical applications

A Krukowski, I Kale - 2007 - books.google.com
DSP System Design presents the investigation of special type of IIR polyphase filter
structures combined with frequency transformation techniques used for fast, multi-rate …

[图书][B] Floating-point to Fixed-point Conversion

C Shi - 2004 - search.proquest.com
The digital signal processing (DSP) algorithms used by communication systems are typically
specified as floating-point or, ideally, infinite precision operations. On the other hand, digital …

[PDF][PDF] Efficient architectural transformation of multirate recursive filters

U Farooq - 2008 - yli-kaakinen.fi
Multirate filters are digital filters where sampling rate of the input signal is changed into
another sampling rate at the output. The sampling rate conversions are required in a variety …

Noise reduction in digital iir filters by finding optimum arrangement of second-order sections

M Lankarany, H Marvi - 2008 Canadian Conference on …, 2008 - ieeexplore.ieee.org
This paper proposed a new method to obtain an optimum arrangement of the second-order
sections in digital IIR filters in order to reduce the steady-state output noise variance when …

An FPGA based decimation filter processor design for real-time continuous-time Σ− Δ modulator performance measurement and evaluation

S Cetinsel, RCS Morling, I Kale - 2011 20th European …, 2011 - ieeexplore.ieee.org
This paper reports on a Field Programmable Gate Array (FPGA) implementation as well as
prototyping for real-time testing of a low complexity high efficiency decimation filter …

Merged Delay Transformed IIR Down Sampler Filter: An efficient architecture and cost reduction technique for implementation

A Patni, V Soni - … on Industrial Instrumentation and Control (ICIC …, 2015 - ieeexplore.ieee.org
In this paper, an efficient Infinite Impulse Response Decimation Architecture based on
conventional IIR filter using Merged Delay Transformation (MDT) is proposed. The technique …

[PDF][PDF] Digital processing of environmental noise samples

M Lahtinen - Jyväskylä licentiate theses in computing, 2014 - jyx.jyu.fi
Digital Processing of Environmental Noise Samples Page 1 Digital Processing of Environmental
Noise Samples Mikko Lahtinen JYVÄSKYLÄ LICENTIATE THESES IN COMPUTING 17 Page 2 …

High speed and computationally efficient architecture for recursive interpolation filters

U Farooq, H Jamal, SA Khan - Signal processing, 2009 - Elsevier
The paper presents high speed and computationally efficient architecture for the recursive
interpolation filters for digital audio applications. Conversion of anti-imaging IIR filter that is …

MDT Based Infinite Impulse Response-Decimation Filter (IIR-DF) Design: An Efficient and Low Computational Cost Design Approach

D Sharma, V Soni, P Jain - i-Manager's Journal on Digital …, 2018 - search.proquest.com
In this paper, the Merged Delay Transformation approach has been employed in order to
design Infinite Impulse Response-Decimation Filter (IIR-DF) and it has also been proved that …