Analog to digital converters (ADC): A literature review

H Dalmia, SK Sinha - E3S Web of Conferences, 2020 - e3s-conferences.org
The signal processing is advancing day by day as its needs and in wireline/wireless
communication technology from 2G to 4G cellular communication technology with CMOS …

A low‐offset low‐power and high‐speed dynamic latch comparator with a preamplifier‐enhanced stage

JK Folla, ML Crespo, ET Wembe… - IET Circuits, Devices …, 2021 - Wiley Online Library
The preamplifier module is a crucial element while designing dynamic latch comparators.
The traditional double tail comparator utilizes a differential pair as the preamplifier stage …

A 1 V, 0.53 ns, 59 μW current comparator using standard 0.18 μm CMOS technology

F Yu, L Gao, L Liu, S Qian, S Cai, Y Song - Wireless Personal …, 2020 - Springer
This letter aim to propose a current comparator based on simple current mirror which use
single amplifier to reduce input offset, the improving symmetry current comparator achieve …

Digitally assisted dynamic comparator with reduced offset across process, voltage, and temperature variations

BA Abdelmagid, AN Mohieldin - AEU-International Journal of Electronics …, 2022 - Elsevier
A dynamic latched comparator with a programmable tail transistor is proposed. The tail
transistor is divided into N branches that could be enabled or disabled to allow optimizing …

Fast and accurate technique for comparator offset voltage simulation

H Omran - Microelectronics Journal, 2019 - Elsevier
A universal simulation technique for determining comparator offset voltage is proposed. The
proposed technique uses a modified successive approximation algorithm to determine the …

Performance analysis on low-power, low-offset, high-speed comparator for high-speed ADCA review

K Mehra, T Sharma, S Somal - Intelligent Communication and …, 2021 - taylorfrancis.com
In the construction of a high-speed analog-to-digital converter, it becomes necessary to use
low-power high-speed comparators to achieve a high speed of operation. The comparators …

Analysis and Design of Low Power Low Voltage Dynamic Comparator with Bulk-Driven Technique for Adcs

J Pirhadi, A Soleymani - Available at SSRN 4915169 - papers.ssrn.com
Amidst the rising efficiency of digital signal processors, the demand for analog-to-digital
converters (ADCs) boasting low power consumption and high precision has surged. It is …

7 Performance Analysis on

LO Low-Power, HS Comparator - Intelligent Communication and …, 2021 - books.google.com
Nowadays low-power high-speed analog-to-digital converters (ADCs) are the most
important part of the numerous handheld appliances. The comparator is a basic construction …

[引用][C] Review on High-Speed Dynamic Comparators for Analog to Digital Converters

K Krishna, N Nambath - Journal of Circuits, Systems and Computers, 2024 - World Scientific
This paper presents a comprehensive review of the state-of-art high-speed dynamic
comparators. The comparator is a critical block of high-speed, low-power analog-to-digital …