Architectures for wavelet transforms: A survey

C Chakrabarti, M Vishwanath, RM Owens - Journal of VLSI signal …, 1996 - Springer
Wavelet transforms have proven to be useful tools for several applications, including signal
analysis, signal compression and numerical analysis. This paper surveys the VLSI …

[图书][B] Digital signal processing with field programmable gate arrays

U Meyer-Baese, U Meyer-Baese - 2007 - Springer
Asia area prefer Verilog, while US east coast and Europe more frequently use VHDL. For
DSP with FPGAs both languages seem to be well suited, although some VHDL examples …

Fast algorithms for discrete and continuous wavelet transforms

O Rioul, P Duhamel - IEEE transactions on information theory, 1992 - ieeexplore.ieee.org
Several algorithms are reviewed for computing various types of wavelet transforms: the
Mallat algorithm (1989), the'a trous' algorithm, and their generalizations by Shensa. The goal …

VLSI architectures for the discrete wavelet transform

M Vishwanath, RM Owens… - IEEE Transactions on …, 1995 - ieeexplore.ieee.org
A class of VLSI architectures based on linear systolic arrays, for computing the 1-D Discrete
Wavelet Transform (DWT), is presented. The various architectures of this class differ only in …

The recursive pyramid algorithm for the discrete wavelet transform

M Vishwanath - IEEE Transactions on Signal Processing, 1994 - ieeexplore.ieee.org
The recursive pyramid algorithm (RPA) is a reformulation of the classical pyramid algorithm
(PA) for computing the discrete wavelet transform (DWT). The RPA computes the N-point …

Hardware efficient fast parallel FIR filter structures based on iterated short convolution

C Cheng, KK Parhi - … Transactions on Circuits and Systems I …, 2004 - ieeexplore.ieee.org
This paper presents an iterated short convolution (ISC) algorithm, based on the mixed radix
algorithm and fast convolution algorithm. This ISC-based linear convolution structure is …

Low-area/power parallel FIR digital filter implementations

DA Parker, KK Parhi - Journal of VLSI signal processing systems for signal …, 1997 - Springer
This paper presents a novel approach for implementing area-efficient parallel (block) finite
impulse response (FIR) filters that require less hardware than traditional block FIR filter …

Area-efficient parallel FIR digital filter structures for symmetric convolutions based on fast FIR algorithm

YC Tsao, K Choi - IEEE transactions on very large scale …, 2010 - ieeexplore.ieee.org
Based on fast finite-impulse response (FIR) algorithms (FFAs), this paper proposes new
parallel FIR filter structures, which are beneficial to symmetric coefficients in terms of the …

A Novel Digital Equalizer based on RF Sampling beyond GHz

L Canese, GC Cardarilli, R La Cesa, L Di Nunzio… - IEEE …, 2024 - ieeexplore.ieee.org
Hardware implementations represent the major challenges when digital signal processors
for ultra-wideband (UWB) signals must be developed. Due to the limitation of the maximum …

Frequency spectrum based low-area low-power parallel FIR filter design

JG Chung, KK Parhi - EURASIP Journal on Advances in Signal …, 2002 - Springer
Parallel (or block) FIR digital filters can be used either for high-speed or low-power (with
reduced supply voltage) applications. Traditional parallel filter implementations cause linear …