After a plethora of high-profile RowHammer attacks, CPU and DRAM vendors scrambled to
deliver what was meant to be the definitive hardware solution against the RowHammer …

(57) ABSTRACT A semiconductor memory device and a memory system having the same
are provided. The semiconductor memory device includes a memory cell array including …

Apparatuses and methods for generating multiple row hammer address refresh sequences.
An example apparatus may include an address scrambler and a refresh control circuit. The …

An example apparatus according to an aspect of the present disclosure includes an address
scrambler circuit including a sub-wordline scrambler circuit configured to receive a first …

(57) ABSTRACT A semiconductor device according to an aspect of the present invention
has: a plurality of memory cells MC; a plurality of word lines WL each coupled to a …

Apparatuses and methods for selective row refreshes are disclosed herein. An example
apparatus may include a refresh control circuit. The refresh control circuit may be configured …

Embodiments of the disclosure are drawn to apparatuses and methods for scheduling
targeted refreshes in a memory device. Memory cells in a memory device may be volatile …

Apparatuses and methods for targeted row refreshes are disclosed herein. In an example
apparatus, a predecoder receives a target row address and determines whether a target row …

An apparatus includes a first word line, a second word line and a control. The second word
line is contiguous to the first word line. The control circuit includes a first defective address …

Apparatuses and methods for targeted row refreshes are disclosed herein. In an example
apparatus, a predecoder receives a target row address and determines whether a target row …