US 2007/0202254A1 Aug. 30, 2007 Related US Application Data Continuation-in-part of
application No. 1 1/456,073, filed on Jul. 6, 2006, now Pat. No. 7,416,979, which is a …

A substrate for use in fabrication of an integrated circuit has a layer with a plurality of
conductive interconnects. The substrate includes a semiconductor body, a dielectric layer …

An inductor is formed on a wafer by attaching a first core structure to the wafer with a pick
and place operation, forming a coil with one or more thick metal layers over the first core …

(57) ABSTRACT A component including a Substrate, at least one layer includ ing a color
conversion material including quantum dots disposed over the Substrate, and a layer …

The present inventions relate to optical components which include quantum confined
semiconductor nanoparticles, wherein at least a portion of the nanoparticles include a ligand …

(57) ABSTRACT A component including a substrate, at least one layer includ ing a color
conversion material including quantum dots disposed over the substrate, and a layer …

A lighting device including an emissive material comprising quantum dots and a liquid
medium disposed within a sealed container with at least a portion of a light guiding member …

A copper-topped interconnect structure allows the combination of high density design areas,
which have low current requirements that can be met with tightly packed thin and narrow …

US7071047B1 - Method of forming buried isolation regions in semiconductor substrates
and semiconductor devices with buried isolation regions - Google Patents US7071047B1 …

A copper-compatible fuse target is fabricated by forming a copper target structure at the
same time that the copper traces are formed. After the copper target structure and the copper …