Quantum Probabilistic Model Checking for Time-Bounded Properties

S Jeon, K Cho, CG Kang, J Lee, H Oh… - Proceedings of the ACM …, 2024 - dl.acm.org
Probabilistic model checking (PMC) is a verification technique for analyzing the properties of
probabilistic systems. However, existing techniques face challenges in verifying large …

Efficient techniques for fault detection and location of multiple controlled Toffoli-based reversible circuit

D Kheirandish, M Haghparast, M Reshadi… - Quantum Information …, 2021 - Springer
It is very important to detect and correct faults for ensuring the validity and reliability of these
circuits. In this regard, a comparative study with related existing techniques is undertaken …

Advancing nanoscale computing: Efficient reversible ALU in quantum-dot cellular automata

S Nemattabar, M Mosleh, M Haghparast… - Nano Communication …, 2024 - Elsevier
This paper presents a significant contribution to the field of nanoscale computing by
proposing an innovative reversible Arithmetic and Logic Unit (ALU) implemented in …

A fault-tolerant and scalable column-wise reversible quantum multiplier with a reduced size

SM Shahidi, S Etemadi Borujeni - Quantum Information Processing, 2023 - Springer
The reversible multipliers are of significant importance in implementing the computational
systems by the novel technologies. The generation section of partial products and adders …

T-count and T-depth efficient fault-tolerant quantum arithmetic and logic unit

S Keshavarz, MR Reshadinezhad… - Quantum Information …, 2024 - Springer
Quantum circuits are one of the best platforms to implement quantum algorithms.
Concerning fault-tolerant quantum circuit, the Clifford+ T gate set supports quantum circuits …

Optimized designs of reversible arithmetic logic unit

A Bolhassani, M Haghparast - Turkish Journal of Electrical …, 2017 - journals.tubitak.gov.tr
Reversible logic has emerged as a promising paradigm in various domains, such as low
power VLSI design, quantum cellular automata, and nanotechnology-based systems. The …

Optimized 4-bit quantum reversible arithmetic logic unit

S Ayyoub, B Achour - International Journal of Theoretical Physics, 2017 - Springer
Reversible logic has received a great attention in the recent years due to its ability to reduce
the power dissipation. The main purposes of designing reversible logic are to decrease …

On design of parity preserving reversible adder circuits

M Haghparast, A Bolhassani - International Journal of Theoretical Physics, 2016 - Springer
In this paper novel parity preserving reversible logic blocks are presented and verified.
Then, we present cost-effective parity preserving reversible implementations of Full Adder, 4 …

Design and implementation of a reversible central processing unit

L Jamal, HMH Babu - 2015 IEEE Computer Society Annual …, 2015 - ieeexplore.ieee.org
This work addresses the reversible circuit design using novel modularization approach by
presenting architecture of a logically reversible processor based on the Von Neumann …

Efficient designs of reversible majority voters

D Kheirandish, M Haghparast, M Reshadi… - Journal of Electronic …, 2020 - Springer
Reversible Logic is one of the emerging technologies that has the capability of replacing
traditional irreversible systems. The power consumption is low by the elimination of power …