BACKGROUND While Integrated circuits including logic devices and inter face circuits
based upon metal-oxide-semiconductor field effect transistors (MOSFETs) are typically …

A memory device is described, which includes a block of memory cells comprising a plurality
of stacks of horizontal active lines such as NAND string channel lines, with a plurality of …

A vertical-type nonvolatile memory device is provided in which differences between the
sizes of channel holes in which channel structures are formed are reduced. The vertical-type …

Semiconductor devices, such as three-dimensional memory devices, include a memory
array including a stack of conductive tiers and a stair step structure. The stair step structure is …

According to one embodiment, a semiconductor memory device includes a first memory
chip, a circuit chip, and an external connection electrode on a surface of the first memory …

Disclosed herein are techniques for fabricating 3D NAND memory devices having a mono-
crystalline silicon semicon ductor vertical NAND channel. Memory holes are formed in …

A nonvolatile memory device includes a conductive line disposed on a substrate and
vertically extended from the substrate, a first channel layer disposed on the substrate and …

According to one embodiment, a semiconductor memory device includes a stacked body
including a plurality of electrode layers and a plurality of inter-layer insulating layers each …

The present disclosure relates to a method of forming an integrated circuit (IC). In some
embodiments, a substrate is provided comprising a memory region and a logic region. A …

May 29, 2012, now Pat. No. 8,467,219, which is a continuation of application No.
12/692.798, filed on A 3D memory device includes a plurality of ridge-shaped Jan. 25, 2010 …