[图书][B] DSP system design: Complexity reduced IIR filter implementation for practical applications

A Krukowski, I Kale - 2007 - books.google.com
DSP System Design presents the investigation of special type of IIR polyphase filter
structures combined with frequency transformation techniques used for fast, multi-rate …

A high-fidelity decimator chip for the measurement of Sigma-Delta modulator performance

I Kale, RCS Morling, A Krukowski… - IEEE Transactions on …, 1995 - ieeexplore.ieee.org
This paper reports on results from the algorithmic design and simulation of a two-path
polyphase decimation filter with 24-bit accuracy over the frequency range from dc to 15.2 …

Two-path all-pass based half-band infinite impulse response decimation filters and the effects of their non-linear phase response on ECG signal acquisition

Y Eminaga, A Coskun, I Kale - Biomedical Signal Processing and Control, 2017 - Elsevier
This paper is based on the novel use of a very high fidelity decimation filter chain for
Electrocardiogram (ECG) signal acquisition and data conversion. The multiplier-free and …

Efficient FPGA-based multistage two-path decimation filter for noise thermometer

H Saleh, E Zimmermann… - … The 13th International …, 2001 - ieeexplore.ieee.org
This paper introduces an efficient Field Programmable Gate Array (FPGA) realization of a
multistage decimation filter with narrow passband and very narrow transition band for noise …

A high fidelity decimation filter for sigma-delta converters

I Kale, RCS Morling, A Krukowski, DA Devine - 1994 - IET
This paper reports on results from the algorithmic design and simulation of a two-path poly-
phase decimation filter with 24-bit accuracy over the frequency range from dc to …

The design of polyphase-based IIR multiband filters

A Krukowski, I Kale, RCS Morling - 1997 IEEE International …, 1997 - ieeexplore.ieee.org
This paper addresses a new approach for the design of multiband filters with step like
magnitude responses and extremely flat, weighted passbands down to/spl mu/dBs. Our new …

Architectural design simulation and silicon implementation of a very high fidelity decimation filter for sigma-delta data converters

I Kale, RCS Morling, A Krukowski… - … in I & M. 1994 IEEE …, 1994 - ieeexplore.ieee.org
This paper reports on results from the algorithmic design and simulation of a two-path poly-
phase decimation filter with 24-bit accuracy over the frequency range from dc to …

High resolution data conversion via Σ-Δ modulators and polyphase filters: a review

I Kale, RCS Morling - Measurement, 1996 - Elsevier
This paper takes a brief look at conventional data conversion schemes, setting the scene for
the inevitability of the Sigma-Delta (Σ-Δ) approach in conjunction with digital decimation …

[PDF][PDF] Design Simulation and Silicon Implementation of a Very High Fidelity 24-bit Potential Decimation Filter for Sigma-Delta A/D Converters

I Kale, RCS Morling, A Krukowski - Fourth Cost - academia.edu
Design Simulation and Silicon Implementation of a Very High Fidelity 24-bit Potential
Decimation Filter for Sigma-Delta A/D Conv Page 1 Proceedings Fourth Cost 22 Workshop …

The Constructing of Bayesian Networks Based on Intelligent Optimization

Y Yang, Y Wu, S Liu, J Liu - Sixth International Conference on …, 2006 - ieeexplore.ieee.org
Bayesian optimization algorithm is very important a type of the intelligent optimization
algorithms. It uses Bayesian networks to model promising solutions from the current …