Ripple: Profile-guided instruction cache replacement for data center applications

TA Khan, D Zhang, A Sriraman… - 2021 ACM/IEEE 48th …, 2021 - ieeexplore.ieee.org
Modern data center applications exhibit deep software stacks, resulting in large instruction
footprints that frequently cause instruction cache misses degrading performance, cost, and …

Ocolos: Online code layout optimizations

Y Zhang, TA Khan, G Pokam, B Kasikci… - 2022 55th IEEE/ACM …, 2022 - ieeexplore.ieee.org
The processor front-end has become an increasingly important bottleneck in recent years
due to growing application code footprints, particularly in data centers. First-level instruction …

Alternate Path μ-op Cache Prefetching

S Singh, A Perais, A Jimborean… - 2024 ACM/IEEE 51st …, 2024 - ieeexplore.ieee.org
Datacenter applications are well-known for their large code footprints. This has caused
frontend design to evolve by implementing decoupled fetching and large prediction …

Rebasing microarchitectural research with industry traces

J Feliu, A Perais, DA Jiménez… - 2023 IEEE International …, 2023 - ieeexplore.ieee.org
Microarchitecture research relies on performance models with various degrees of accuracy
and speed. In the past few years, one such model, ChampSim, has started to gain significant …