A container-based DoS attack-resilient control framework for real-time UAV systems

J Chen, Z Feng, JY Wen, B Liu… - 2019 Design, Automation …, 2019 - ieeexplore.ieee.org
The Unmanned aerial vehicles (UAVs) sector is fast-expanding. Protection of real-time UAV
applications against malicious attacks has become an urgent problem that needs to be …

Profiling and controlling I/O‐related memory contention in COTS heterogeneous platforms

M Zini, G Cicero, D Casini… - Software: Practice and …, 2022 - Wiley Online Library
Motivated by the increasing number of embedded applications that make use of traffic‐
intensive I/O devices, this work studies the memory contention generated by I/O devices and …

Mixed-criticality scheduling on cluster-based manycores with shared communication and storage resources

G Giannopoulou, N Stoimenov, P Huang, L Thiele… - Real-Time …, 2016 - Springer
The embedded system industry is facing an increasing pressure for migrating from single-
core to multi-and many-core platforms for size, performance and cost purposes. Real-time …

A real-time scratchpad-centric os with predictable inter/intra-core communication for multi-core embedded systems

R Tabish, R Mancuso, S Wasly, R Pellizzoni… - Real-Time …, 2019 - Springer
Multi-core processors have replaced single-core systems in almost every segment of the
industry. Unfortunately, their increased complexity often causes a loss of temporal …

Memory utilization-based dynamic bandwidth regulation for temporal isolation in multi-cores

A Saeed, D Dasari, D Ziegenbein… - 2022 IEEE 28th Real …, 2022 - ieeexplore.ieee.org
Temporal isolation is one of the key challenges for co-running mixed-criticality applications
on Commercial Off-The-Shelf (COTS) multi-core platforms. In particular, the main memory …

Mempol: policing core memory bandwidth from outside of the cores

A Zuepke, A Bastoni, W Chen… - 2023 IEEE 29th Real …, 2023 - ieeexplore.ieee.org
In today's multiprocessor systems-on-a-chip (MP-SoC), the shared memory subsystem is a
known source of temporal interference. The problem causes logically independent cores to …

Bwlock: A dynamic memory access control framework for soft real-time applications on multicore platforms

H Yun, W Ali, S Gondi, S Biswas - IEEE Transactions on …, 2016 - ieeexplore.ieee.org
Soft real-time applications often show bursty memory access patterns-requiring high
memory bandwidth for a short duration of time-that are often critical for timely data …

Analysis of dynamic memory bandwidth regulation in multi-core real-time systems

A Agrawal, R Mancuso, R Pellizzoni… - 2018 IEEE Real-Time …, 2018 - ieeexplore.ieee.org
One of the primary sources of unpredictability in modern multi-core embedded systems is
contention over shared memory resources, such as caches, interconnects, and DRAM …

An isolation scheduling model for multicores

P Huang, G Giannopoulou, R Ahmed… - 2015 IEEE Real …, 2015 - ieeexplore.ieee.org
Efficiently exploiting multicore processors for real-time applications is challenging because
jobs that run concurrently on different cores can interfere on shared resources, severely …

MemPol: polling-based microsecond-scale per-core memory bandwidth regulation

A Zuepke, A Bastoni, W Chen, M Caccamo… - Real-Time …, 2024 - Springer
In today's multiprocessor systems-on-a-chip, the shared memory subsystem is a known
source of temporal interference. The problem causes logically independent cores to affect …