Structural decomposition in FSM design: Roots, evolution, current state—A review

A Barkalov, L Titarenko, K Krzywicki - Electronics, 2021 - mdpi.com
The review is devoted to methods of structural decomposition that are used for optimizing
characteristics of circuits of finite state machines (FSMs). These methods are connected with …

5 logic synthesis method of digital circuits designed for implementation with embedded memory blocks of FPGAs

M Rawski, P Tomaszewicz, G Borowik… - Design of Digital Systems …, 2011 - Springer
The paper presents logic synthesis method targeted at FPGA architectures with specialized
embedded memory blocks (EMBs). Existing methods do not ensure effective utilization of the …

[PDF][PDF] Technology mapping of multi-output functions leading to the reduction of dynamic power consumption in FPGAs

A Opara, M Kubica - International Journal of Applied …, 2023 - intapi.sciendo.com
This article presents a synthesis strategy aimed at minimizing the dynamic power
consumption of combinational circuits mapped in LUT blocks of FPGAs. The implemented …

Improving the characteristics of multi-level LUT-based Mealy FSMs

A Barkalov, L Titarenko, K Krzywicki, S Saburova - Electronics, 2020 - mdpi.com
Contemporary digital systems include many varying sequential blocks. In the article, we
discuss a case when Mealy finite state machines (FSMs) describe the behavior of sequential …

Improving characteristics of LUT-based mealy FSMs with twofold state assignment

A Barkalov, L Titarenko, K Krzywicki, S Saburova - Electronics, 2021 - mdpi.com
Practically, any digital system includes sequential blocks. This article is devoted to a case
when sequential blocks are represented by models of Mealy finite state machines (FSMs) …

Encoding of terms in EMB-based Mealy FSMs

A Barkalov, L Titarenko, M Mazurkiewicz, K Krzywicki - Applied Sciences, 2020 - mdpi.com
A method is proposed targeting implementation of FPGA-based Mealy finite state machines.
The main goal of the method is a reduction for the number of look-up table (LUT) elements …

Logic synthesis strategy for FPGAs with embedded memory blocks

M Rawski, G Borowik, T Luba… - 2009 MIXDES-16th …, 2009 - ieeexplore.ieee.org
With the evolution of programmable structures, that become more heterogeneous, the
process of mapping a design into these structures becomes more and more complex …

Evolution of programmable logic

A Barkalov, L Titarenko, A Barkalov… - Logic synthesis for FSM …, 2009 - Springer
The chapter discussed contemporary field-programmable logic devices and their evolution,
starting from the simplest programmable logic devices such as PROM, PLA, PAL and GAL …

[PDF][PDF] Synthesis of finite state machines for programmable devices based on multi-level implementation

A Bukowiec - 2008 - zbc.uz.zgora.pl
New architectures of FPGA devices combine different type of logic elements like look-up
tables, flip-flops and memory blocks. But standard synthesis methods utilize only look-up …

Input variable partitioning method for decomposition-based logic synthesis targeted heterogeneous FPGAs

M Rawski - International Journal of Electronics and …, 2012 - yadda.icm.edu.pl
The functional decomposition has found an applica-tion in many fields of modern
engineering and science, such as combinational and sequential logic synthesis for VLSI …