DAMOV: A new methodology and benchmark suite for evaluating data movement bottlenecks
Data movement between the CPU and main memory is a first-order obstacle against improv
ing performance, scalability, and energy efficiency in modern systems. Computer systems …
ing performance, scalability, and energy efficiency in modern systems. Computer systems …
pluto: Enabling massively parallel computation in dram via lookup tables
Data movement between the main memory and the processor is a key contributor to
execution time and energy consumption in memory-intensive applications. This data …
execution time and energy consumption in memory-intensive applications. This data …
ALP: Alleviating CPU-memory data movement overheads in memory-centric systems
Partitioning applications between near-data processing (NDP) and host CPU cores causes
inter-segment data movement overhead, which is caused by moving data generated by one …
inter-segment data movement overhead, which is caused by moving data generated by one …
Memory-Centric Computing: Recent Advances in Processing-in-DRAM
Memory-centric computing aims to enable computation capability in and near all places
where data is generated and stored. As such, it can greatly reduce the large negative …
where data is generated and stored. As such, it can greatly reduce the large negative …
A generic processing in memory cycle accurate simulator under hybrid memory cube architecture
PIM was one of the attempts created during the 1990s to try to mitigate the notorious memory
wall problem, where computational elements are added close, or ideally, inside the memory …
wall problem, where computational elements are added close, or ideally, inside the memory …
PUMA: Efficient and Low-Cost Memory Allocation and Alignment Support for Processing-Using-Memory Architectures
GF Oliveira, EG Esposito, J Gómez-Luna… - arXiv preprint arXiv …, 2024 - arxiv.org
Processing-using-DRAM (PUD) architectures impose a restrictive data layout and alignment
for their operands, where source and destination operands (i) must reside in the same …
for their operands, where source and destination operands (i) must reside in the same …
Intrinsics-hmc: An automatic trace generator for simulations of processing-in-memory instructions
Resumo Processor-in-Memory (PIM) architectures, such as the Hybrid Memory Cube (HMC),
are emerging nowadays as a solution for processing large amount of data directly inside the …
are emerging nowadays as a solution for processing large amount of data directly inside the …
Novel techniques to improve the performance and the energy of vector architectures
A Barredo Ferreira - 2021 - upcommons.upc.edu
The rate of annual data generation grows exponentially. At the same time, there is a high
demand to analyze that information quickly. In the past, every processor generation came …
demand to analyze that information quickly. In the past, every processor generation came …