Simplified symbolic transfer function factorization using combined artificial bee colony and simulated annealing
M Shokouhifar, A Jalali - Applied Soft Computing, 2017 - Elsevier
Symbolic circuit analysis inherits the exponential growth of transfer function complexity with
the circuit size. Therefore, symbolic simplification is an NP-hard problem. Although many …
the circuit size. Therefore, symbolic simplification is an NP-hard problem. Although many …
A symbolic pole/zero extraction methodology based on analysis of circuit time-constants
O Guerra, JD Rodriguez-Garcia, FV Fernandez… - … Integrated Circuits and …, 2002 - Springer
This paper introduces a methodology for symbolic pole/zero extraction based on the
formulation of the time-constant matrix of the circuits. This methodology incorporates …
formulation of the time-constant matrix of the circuits. This methodology incorporates …
Matrix approximation techniques for symbolic extraction of poles and zeros
E Hennig - Analog Integrated Circuits and Signal Processing, 2002 - Springer
Several recently published approaches to symbolic pole/zero analysis of analog circuits
exploit the order reduction effect of Simplification Before Generation (SBG) techniques [1] …
exploit the order reduction effect of Simplification Before Generation (SBG) techniques [1] …
Mathematical Root Simplification in Operational Amplifiers using an Ensemble Heuristic-Metaheuristic Algorithm
N Behmanesh-Fard, H Yazdanjouei, M Shokouhifar… - 2023 - preprints.org
Symbolic pole/zero analysis is an important step when designing an analog operational
amplifier. Generally, a simplified symbolic analysis of analog circuits suffers from NP …
amplifier. Generally, a simplified symbolic analysis of analog circuits suffers from NP …
[PDF][PDF] A program for the computation of the approximate symbolic pole/zero expressions
A Program for the Computation of the Approximate Symbolic Pole/Zero Expressions Page 1 I-197
ECCTD’01 - European Conference on Circuit Theory and Design, August 28-31, 2001, Espoo …
ECCTD’01 - European Conference on Circuit Theory and Design, August 28-31, 2001, Espoo …
A semi-symbolic method of electronic circuit design by pole and zero distribution optimization using time-constants approximation including inductors
F Balik - 2010 XIth International Workshop on Symbolic and …, 2010 - ieeexplore.ieee.org
In this work a new method of linear circuit design in frequency domain by poles (zeros)
distribution optimization is presented. The method which uses the relationship between …
distribution optimization is presented. The method which uses the relationship between …
[PDF][PDF] COMPUTATION OF SIMPLE SYMBOLIC POLE EXPRESSIONS
Some approximate symbolic pole expressions of a fourth order circuit are computed with a
relative error of 10-3 in a design point. A very simple form (a ratio of second degree …
relative error of 10-3 in a design point. A very simple form (a ratio of second degree …
[图书][B] Metody transimpedancyjne w analizie symbolicznej i optymalizacji układów elektronicznych
F Balik - 2012 - dbc.wroc.pl
Poprawa efektywności obliczeniowej wielokrotnie powtarzanych analiz układów
elektronicznych w takich procesach obliczeniowych, jak np. optymalizacja lub analiza …
elektronicznych w takich procesach obliczeniowych, jak np. optymalizacja lub analiza …