In this paper, we propose two efficient implementations of complex multipliers on field-
programmable gate arrays (FPGAs) using DSP slices. The first implementation aims for high …

In the FFT computation, the butterflies play a central role, since they allow calculation of
complex terms. In this calculation, involving multiplications of input data with appropriate …

This research article presents an implementation of high-performance Fast Fourier
Transform (FFT) and Inverse Fast Fourier Transform (IFFT) core for multiple input multiple …

This paper presents two adder compressors architectures addressing high-speed and low
power. Adder compressors are used to implement arithmetic circuits such as multipliers and …

In recent years the Fast Fourier Transform is widely used in a number of applications as it is
considered to be an efficient algorithm to compute the Discrete Fourier Transform. The …

Our aim is the development of a high-speed and low-power-dissipation fast Fourier
transform processor using single-flux-quantum circuits. We have been working on the …

The addition is the most used arithmetic operation in Digital Signal Processing (DSP)
algorithms, such as filters, transforms and predictions. These algorithms are increasingly …

In professional/consumer domains, video databases are broadly applied, facilitating quick
searching by fast region analysis, to provide an indication of the video contents. For realtime …

This paper addresses the design of power efficient dedicated structures of Radix-2
Decimation in Time (DIT) pipelined butterflies, aiming the implementation of low power Fast …

This paper presents an advanced method of implementing Fast Fourier Transform (FFT)
using pipelining concepts. FFT is a technique which efficiently calculates the DFT by …