Method for introducing impurities and apparatus for introducing impurities

Y Sasaki, B Mizuno, CG Jin - US Patent 8,222,128, 2012 - Google Patents
US PATENT DOCUMENTS 5,407,845. A 4/1995 Nasu et al. 5,496,752 A 3, 1996 Nasu et al.
5,561,072 A 10, 1996 Saito 5,892.235 A 4/1999 Yamazaki et al. 5,897,346 A 4/1999 …

Analytical model for redistribution profile of ion-implanted impurities during solid-phase epitaxy

K Suzuki, Y Kataoka, S Nagayama… - … on electron devices, 2007 - ieeexplore.ieee.org
We evaluated the redistribution profiles of ion-implanted impurities during solid-phase
epitaxy using Rutherford backscattering spectrometry (RBS). RBS data revealed that the As …

A new TDDB reliability prediction methodology accounting for multiple SBD and wear out

S Sahhaf, R Degraeve, PJ Roussel… - … on Electron Devices, 2009 - ieeexplore.ieee.org
In this paper, we study time-dependent dielectric breakdown in thin gate oxides and propose
a new methodology applicable to a wide range of gate stacks for extracting soft breakdown …

Fast Fourier transform scanning spreading resistance microscopy: a novel technique to overcome the limitations of classical conductive AFM techniques

P Eyben, P Bisiaux, A Schulze, A Nazir… - …, 2015 - iopscience.iop.org
A new atomic force microscopy (AFM)-based technique named fast Fourier transform
scanning spreading-resistance microscopy (FFT-SSRM) has been developed. FFT-SSRM …

Analysis of the subthreshold current of pocket or halo-implanted nMOSFETs

RJE Hueting, A Heringa - IEEE transactions on electron devices, 2006 - ieeexplore.ieee.org
In this work, we analyzed the subthreshold current (I/sub D/) of pocket implanted MOSFETs
using extensive device simulations and experimental data. We present an analytical model …

Electrical characteristics of 8-/spl Aring/EOT HfO/sub 2//TaN low thermal-budget n-channel FETs with solid-phase epitaxially regrown junctions

LA Ragnarsson, S Severi, L Trojman… - IEEE transactions on …, 2006 - ieeexplore.ieee.org
The authors demonstrate high-performing n-channel transistors with a HfO/sub 2//TaN gate
stack and a low thermal-budget process using solid-phase epitaxial regrowth of the source …

Accurate channel length extraction by split CV measurements on short-channel MOSFETs

S Severi, G Curatola, C Kerner… - IEEE electron device …, 2006 - ieeexplore.ieee.org
This paper investigates the extraction of channel length from split current-voltage (CV)
measurements of small gate length PMOS transistors. Using device simulations, including …

Plasma doping method

Y Sasaki, K Okashita, H Ito, B Mizuno… - US Patent …, 2008 - Google Patents
US7407874B2 - Plasma doping method - Google Patents US7407874B2 - Plasma doping
method - Google Patents Plasma doping method Download PDF Info Publication number …

Plasma doping method and plasma doping apparatus

Y Sasaki, K Okashita, H Ito, B Mizuno… - US Patent …, 2008 - Google Patents
A plasma doping method, even though a plasma doping treatment is repeated, can make a
dose from a film to a silicon substrate uniform for each time. The method includes preparing …

Plasma doping method

Y Sasaki, K Okashita, H Ito, B Mizuno… - US Patent …, 2008 - Google Patents
A plasma doping method that can control a dose precisely is realized. In-plane uniformity of
the dose is improved. It has been found that, if a bias is applied by irradiating B 2 H 6/He …