76–81-GHz CMOS transmitter with a phase-locked-loop-based multichirp modulator for automotive radar
This paper presents the design of a linear frequency-modulated continuous-wave (FMCW)
radar transmitter (TX) for automotive radar applications. The TX has a wide operating range …
radar transmitter (TX) for automotive radar applications. The TX has a wide operating range …
A low-noise quadrature VCO based on magnetically coupled resonators and a wideband frequency divider at millimeter waves
U Decanis, A Ghilioni, E Monaco… - IEEE Journal of Solid …, 2011 - ieeexplore.ieee.org
Wireless on-chip processing at millimeter waves still lacks key functions: quadrature
generation enabling direct conversion architectures and simplifying phased-array systems …
generation enabling direct conversion architectures and simplifying phased-array systems …
Linear CMOS -VCO Based on Triple-Coupled Inductors and Its Application to 40-GHz Phase-Locked Loop
A linear CMOS voltage-controlled oscillator (VCO) utilizing triple-coupled inductors and a 40-
GHz integer-N phase-locked loop (PLL) are fabricated in a standard 90-nm CMOS process …
GHz integer-N phase-locked loop (PLL) are fabricated in a standard 90-nm CMOS process …
A 77-GHz CMOS FMCW frequency synthesizer with reconfigurable chirps
TN Luo, CHE Wu, YJE Chen - IEEE Transactions on microwave …, 2013 - ieeexplore.ieee.org
This paper presents a 77-GHz CMOS frequency-modulated continuous-wave (FMCW)
frequency synthesizer with the capability of reconfigurable chirps. The frequency-sweep …
frequency synthesizer with the capability of reconfigurable chirps. The frequency-sweep …
A CMOS V-band PLL with a harmonic positive feedback VCO leveraging operation in triode region for phase-noise improvement
This paper presents a 53-61 GHz low-power charge-pump integer-N type-II PLL, employing
a class-D V-band voltage control oscillator. Transistors in the VCO enter deep triode region …
a class-D V-band voltage control oscillator. Transistors in the VCO enter deep triode region …
A 64–84-GHz PLL with low phase noise in an 80-GHz SiGe HBT technology
G Liu, A Trasser, H Schumacher - IEEE Transactions on …, 2012 - ieeexplore.ieee.org
This paper presents a 64-84-GHz phase-locked loop (PLL) realized in a low-cost 80-GHz
HBT technology. The circuit consists of a wide tuning-range voltage-controlled oscillator, a …
HBT technology. The circuit consists of a wide tuning-range voltage-controlled oscillator, a …
[HTML][HTML] A V-band phase-locked loop with a novel phase-frequency detector in 65 nm CMOS
A 65–67 GHz phase-locked loop (PLL) with a novel low power phase-frequency detector
(PFD) in 65 nm LP CMOS is presented. The PLL consists of a V-band voltage-controlled …
(PFD) in 65 nm LP CMOS is presented. The PLL consists of a V-band voltage-controlled …
Spur Canceling Technique by Folded xor Gate Phase Detector and Its Application to a Millimeter-Wave SiGe BiCMOS PLL
A folded XOR gate (FXOR) phase detector (PD) is proposed for millimeter-wave (mmW)
SiGe integer-phase-locked loops (PLLs) to relax the tradeoff between PLL loop bandwidth …
SiGe integer-phase-locked loops (PLLs) to relax the tradeoff between PLL loop bandwidth …
A CMOS W-band× 4 frequency multiplier with cascading push-pull frequency doublers
L Ye, H Liao, R Huang - 2012 Asia Pacific Microwave …, 2012 - ieeexplore.ieee.org
This letter presents a CMOS W-band× 4 frequency multiplier with two cascading push-pull
frequency doublers for a W-band frequency synthesizer. A pseudodifferential class-B biased …
frequency doublers for a W-band frequency synthesizer. A pseudodifferential class-B biased …
A 40 GHz 65 nm CMOS phase-locked loop with optimized shunt-peaked buffer
A 40 GHz phase-locked loop (PLL) with an optimized shunt-peaked buffer is realized in
Global Foundries 65 nm CMOS technology. The shunt-peaked buffer placed in the loop …
Global Foundries 65 nm CMOS technology. The shunt-peaked buffer placed in the loop …