[HTML][HTML] Time-Sensitive Networking in automotive embedded systems: State of the art and research opportunities
The functionality advancements and novel customer features that are currently found in
modern automotive systems require high-bandwidth and low-latency in-vehicle …
modern automotive systems require high-bandwidth and low-latency in-vehicle …
A survey of techniques for reducing interference in real-time applications on multicore platforms
T Lugo, S Lozano, J Fernández, J Carretero - IEEE Access, 2022 - ieeexplore.ieee.org
This survey reviews the scientific literature on techniques for reducing interference in real-
time multicore systems, focusing on the approaches proposed between 2015 and 2020. It …
time multicore systems, focusing on the approaches proposed between 2015 and 2020. It …
Analyzing arm's MPAM from the perspective of time predictability
With heterogeneous multi-core platforms being crucial to execute the highly demanding
workloads of modern applications, memory-access predictability remains a key issue for the …
workloads of modern applications, memory-access predictability remains a key issue for the …
Profiling and controlling I/O‐related memory contention in COTS heterogeneous platforms
Motivated by the increasing number of embedded applications that make use of traffic‐
intensive I/O devices, this work studies the memory contention generated by I/O devices and …
intensive I/O devices, this work studies the memory contention generated by I/O devices and …
[PDF][PDF] Designing mixed criticality applications on modern heterogeneous mpsoc platforms
Abstract Multiprocessor Systems-on-Chip (MPSoC) integrating hard processing cores with
programmable logic (PL) are becoming increasingly common. While these platforms have …
programmable logic (PL) are becoming increasingly common. While these platforms have …
Latency analysis of I/O virtualization techniques in hypervisor-based real-time systems
Nowadays, hypervisors are the standard solution to integrate different domains into a shared
hardware platform, while providing safety, security, and predictability. To this end, a …
hardware platform, while providing safety, security, and predictability. To this end, a …
Memory-processor co-scheduling of AECR-DAG real-time tasks on partitioned multicore platforms with scratchpads
Multicore systems with core-level scratchpad memories offer appealing architectures for
constructing efficient and predictable real-time systems. In this work, we aim to improve the …
constructing efficient and predictable real-time systems. In this work, we aim to improve the …
Bus-contention aware schedulability analysis for the 3-phase task model with partitioned scheduling
Multicore platforms are being increasingly adopted in Cyber-Physical Systems (CPS) due to
their advantages over single-core processors, such as raw computing power and energy …
their advantages over single-core processors, such as raw computing power and energy …
Demand layering for real-time DNN inference with minimized memory usage
When executing a deep neural network (DNN), its model parameters are loaded into GPU
memory before execution, incurring a significant GPU memory burden. There are studies …
memory before execution, incurring a significant GPU memory burden. There are studies …
Schedulability analysis for 3-phase tasks with partitioned fixed-priority scheduling
Multicore platforms are being increasingly adopted in Cyber-Physical Systems (CPS) due to
their advantages over single-core processors, such as raw computing power and energy …
their advantages over single-core processors, such as raw computing power and energy …