A survey of silicon photonics for energy-efficient manycore computing
S Pasricha, M Nikdast - IEEE Design & Test, 2020 - ieeexplore.ieee.org
A Survey of Silicon Photonics for Energy-Efficient Manycore Computing Page 1 60 2168-2356/20©2020
IEEE Copublished by the IEEE CEDA, IEEE CASS, IEEE SSCS, and TTTC IEEE Design&Test …
IEEE Copublished by the IEEE CEDA, IEEE CASS, IEEE SSCS, and TTTC IEEE Design&Test …
A survey on optical phase-change memory: The promise and challenges
Silicon photonics (SiPh) technology has facilitated the deployment of integrated photonics
across different application domains, from ultra-fast communication in Datacom applications …
across different application domains, from ultra-fast communication in Datacom applications …
Numerical investigation of reconfigurable photonic crystal switch based on phase change nanomaterial
R Rajasekar, GT Raja… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
In this article, the novel reconfigurable all-optical switches are designed with ultracompact
size, fast response time and high extinction ratio. The hybrid silicon (Si) and phase change …
size, fast response time and high extinction ratio. The hybrid silicon (Si) and phase change …
3× 10 Gb/s silicon three-mode switch with 120° hybrid based unbalanced Mach-Zehnder interferometer
We propose and experimentally demonstrate a reconfigurable mode division multiplexing
(MDM) silicon photonics three-mode switch (3MS) in C-band using a 120° optical hybrid …
(MDM) silicon photonics three-mode switch (3MS) in C-band using a 120° optical hybrid …
Assessment of pedestrians' travel experience at the religious city of Puri using structural equation modelling
RN Mohanty, PS Chani - Journal of Urban Design, 2020 - Taylor & Francis
Puri, one of the most sacred sites for Hindus in India, is visited by millions of tourists every
year. This paper evaluates the travel experience of pedestrians in Puri. A total of 500 …
year. This paper evaluates the travel experience of pedestrians in Puri. A total of 500 …
Simulation and FPGA-based implementation of iterative parallel schedulers for optical interconnection networks
High-performance interconnection networks are required for inter-board, intra-board, and on-
chip data communication. With the growth of data communication, the requirements for high …
chip data communication. With the growth of data communication, the requirements for high …
RSON: An inter/intra-chip silicon photonic network for rack-scale computing systems
The increasing demand for more computational power from scientific computing, big data
processing, and machine learning is pushing the development of HPC (high-performance …
processing, and machine learning is pushing the development of HPC (high-performance …
Co-design of a low-latency centralized controller for silicon photonic multistage MZI-based switches
An FPGA-based centralized controller architecture for silicon photonics switches is
experimentally demonstrated achieving scheduling decision in one clock cycle. The FPGA …
experimentally demonstrated achieving scheduling decision in one clock cycle. The FPGA …
Hyco: A low-latency hybrid control plane for optical interconnection networks
Next-generation multiprocessor systems point to the integration of a large number of cores
(eg, processing and memory) where electrical networks-on-chip (eNoCs) can improve the …
(eg, processing and memory) where electrical networks-on-chip (eNoCs) can improve the …
Optoelectronic integrated circuits for growing datacenters: challenge, strategy, and evolution
X Song, R Li, G Mi, J Suo, Z Zhang… - Smart Photonic and …, 2019 - spiedigitallibrary.org
Hyper scale datacenters drive amazing Ethernet volumes when thousands of servers are
connected on one site, which creates high-density interconnect links between servers …
connected on one site, which creates high-density interconnect links between servers …