Criticality-aware dynamic task scheduling for heterogeneous architectures

K Chronaki, A Rico, RM Badia, E Ayguadé… - Proceedings of the 29th …, 2015 - dl.acm.org
Current and future parallel programming models need to be portable and efficient when
moving to heterogeneous multi-core systems. OmpSs is a task-based programming model …

Task scheduling techniques for asymmetric multi-core systems

K Chronaki, A Rico, M Casas, M Moretó… - … on Parallel and …, 2016 - ieeexplore.ieee.org
As performance and energy efficiency have become the main challenges for next-
generation high-performance computing, asymmetric multi-core architectures can provide …

Automated software testing using metahurestic technique based on an ant colony optimization

PR Srivastava, K Baby - 2010 international symposium on …, 2010 - ieeexplore.ieee.org
Software testing is an important and valuable part of the software development life cycle.
Due to time, cost and other circumstances, exhaustive testing is not feasible that's why there …

MUSA: a multi-level simulation approach for next-generation HPC machines

T Grass, C Allande, A Armejach, A Rico… - SC'16: Proceedings …, 2016 - ieeexplore.ieee.org
The complexity of High Performance Computing (HPC) systems is increasing in the number
of components and their heterogeneity. Interactions between software and hardware involve …

Faithful performance prediction of a dynamic task‐based runtime system for heterogeneous multi‐core architectures

L Stanisic, S Thibault, A Legrand… - Concurrency and …, 2015 - Wiley Online Library
Multi‐core architectures comprising several graphics processing units (GPUs) have become
mainstream in the field of high‐performance computing. However, obtaining the maximum …

Taskpoint: Sampled simulation of task-based programs

T Grass, A Rico, M Casas, M Moreto… - … Analysis of Systems …, 2016 - ieeexplore.ieee.org
Sampled simulation is a mature technique for reducing simulation time of single-threaded
programs, but it is not directly applicable to simulation of multi-threaded architectures …

Parallel GPU architecture simulation framework exploiting work allocation unit parallelism

S Lee, WW Ro - … on Performance Analysis of Systems and …, 2013 - ieeexplore.ieee.org
GPU computing is at the forefront of high-performance computing, and it has greatly affected
current studies on parallel software and hardware design because of its massively parallel …

Data placement in HPC architectures with heterogeneous off-chip memory

M Pavlovic, N Puzovic… - 2013 IEEE 31st …, 2013 - ieeexplore.ieee.org
The performance of HPC applications is often bounded by the underlying memory system's
performance. The trend of increasing the number of cores on a chip imposes even higher …

Design space exploration of next-generation HPC machines

C Gómez, F Martınez, A Armejach… - 2019 IEEE …, 2019 - ieeexplore.ieee.org
The landscape of High Performance Computing (HPC) system architectures keeps
expanding with new technologies and increased complexity. With the goal of improving the …

[图书][B] Dynamic resource allocation in embedded, high-performance and cloud computing

LS Indrusiak, P Dziurzanski, A Kumar Singh - 2016 - library.oapen.org
The availability of many-core computing platforms enables a wide variety of technical
solutions for systems across the embedded, high-performance and cloud computing …