Fully integrated LDO based on push-pull circuitry for enhanced power management in embedded systems

H Ameziane, K Zared, H Akhmal… - International Journal of …, 2024 - inderscienceonline.com
We present a fully integrated analogue LDO voltage regulator with slew rate enhancement
circuitry (SREC). The SREC is employed by implementing the push-pull current booster …

Slew-rate enhancement of a full-on chip CMOS LDO based on a capacitorless push–pull current booster circuit

K Zared, H Ameziane, A Alami Hassani… - … and Renewable Energy …, 2022 - Springer
In this paper, a full-on chip low drop-Out voltage regulator (LDO) with a simple Slew-Rate
Enhancement Circuit (SREC) has been proposed and simulated in TSMC 0.18 μm CMOS …

Temperature-Compensated and Robust Bandgap Reference Voltage Circuit for High-Precision Sensors and Voltage Regulators

H Ameziane, K Zared, H Akhmal, H Qjidaa - International Conference on …, 2023 - Springer
This paper provides a 90 nm CMOS-designed and simulated low-power, high-precision
bandgap reference voltage circuit. The circuit has a low sensitivity to supply voltage and …

Design and Optimization of a Sub-threshold CMOS LDO Regulator with Improved Performance for IoT and Wearable Devices

H Ameziane, K Zared, H Akhmal, H Qjidaa - International Conference on …, 2023 - Springer
This chapter proposes a novel approach to design a low-power LDO regulator for RF SoCs
by utilizing CMOS sub-threshold technology with improved transient response and load …

Low Dropout Voltage Regulator With TSMC 0.18 µm CMOS Technology for Battery Low-Powered Embedded Systems

H Ameziane, K Zared, H Akhmal… - Convergence of Antenna …, 2025 - igi-global.com
This chapter presents a new approach to reducing the size of external capacitors in LDO
voltage regulators, improving their integration in battery low-powered embedded systems …

CMOS LDO Regulator with Improved Performance for lot and Wearable Devices

H Ameziane, K Zared, H Akhmal, H Qjidaa - Advances in Control Power … - books.google.com
This chapter proposes a novel approach to design a lowpower LDO regulator for RF SoCs
by utilizing CMOS subthreshold technology with improved transient response and load …

[PDF][PDF] A New CMOS OP-AMP Design with an Improved Adaptive biasing circuitry

H Ameziane, K Zared, H Qjidaa - WSEAS Transactions on Circuits …, 2020 - academia.edu
This paper sets out a new technique for designing an operational amplifier (OP-AMP) using
tanner EDA 1um FDSOI CMOS Technology. Fully Depleted Silicon on Insulator used for …