In this paper, we compare the performances of FinFETs, lateral gate-all-around (GAA) FETs,
and vertical GAAFETs (VFETs) at 7-nm node dimensions and beyond. Comparison is done …

Nanowire field-effect transistors (NWFETs) are known to become the emerging transistor
type for better performance and low power for future technology nodes beyond 7 nm. Their …

In this work, we will give an overview of the innovations in materials and new device
concepts that will be needed to continue Moore's law to the sub-10 nm technology nodes. To …

In an increasing interconnect resistance era and aggressive metal pitch scaling, the
elevating RC delay could significantly shadow the improvements from advanced device …

A vertical MOS architecture implemented on Si nanowire (NW) array with a scaled Gate-All-
Around (14 nm) and symmetrical diffusive S/D contacts is presented with noteworthy …

For sub-7-nm technology nodes, the gate-all-around (GAA) nanowire-based device structure
is a strong candidate to sustain scaling according to Moore's Law. For the first time, the …

Over the past decade, numerous compute-in-memory (CIM) platforms have been proposed
in the literature. While emerging non-volatile memory based analog CIM (ACIM) has been …

In this paper, we present an intensive study of 6T-SRAM designs for vertical gate-all-around
(GAA) transistors (VFETs) and lateral GAA transistors (LFETs) using 5-nm node design …

In this paper, we present a layout and performance analysis of logic and SRAM circuits for
vertical and lateral GAA FETs using 5nm (iN5) design rules. Extreme ultra-violet lithography …

The GAAFET (gate-all-around FET) is expected to replace FinFETs in future nodes due to its
excellent channel controllability. It is also expected to be an impressive device due to its …