Dynamic scheduling of task graphs in multi-FPGA systems using critical path

R Ramezani - The Journal of Supercomputing, 2021 - Springer
SRAM-based FPGAs feature high performance and flexibility. Thus, they have found many
applications in modern high-performance computing (HPC) systems. These systems suffer …

Reliability and makespan optimization of hardware task graphs in partially reconfigurable platforms

R Ramezani, Y Sedaghat… - … on Aerospace and …, 2017 - ieeexplore.ieee.org
This paper addresses the problem of reliability and makespan optimization of hardware task
graphs in reconfigurable platforms by applying fault tolerance (FT) techniques to the running …

Reliability improvement of hardware task graphs via configuration early fetch

R Ramezani, Y Sedaghat… - IEEE Transactions on …, 2016 - ieeexplore.ieee.org
This paper presents a technique to improve the reliability and the mean time to failure
(MTTF) of hardware task graphs (TGs) running on reconfigurable computers. This technique …

A decomposition-based reliability and makespan optimization technique for hardware task graphs

R Ramezani, Y Sedaghat, M Naghibzadeh… - Reliability Engineering & …, 2018 - Elsevier
This paper presents an approach to optimize the reliability and makespan of hardware task
graphs, running on FPGA-based reconfigurable computers, in space-mission computing …

Exact and efficient reliability and performance optimization of synchronous task graphs

R Ramezani, A Ghavidel, Y Sedaghat - Reliability Engineering & System …, 2021 - Elsevier
SRAM-based FPGAs have found many applications in modern computer systems. In these
systems, high-performance computing applications are executed as task graphs in which …

An Overview of Online Fault Tolerance for FPGA Logic Blocks

S Gohari - Arman Process Journal (APJ), 2023 - armanprocessjournal.ir
Most adaptive computing systems use reconfigurable hardware in the form of field
programmable gate arrays (FPGA). In order for these systems to be fielded in harsh …