The adoption of dynamic dividers in CMOS phase-locked loops for multigigahertz
applications allows to reduce the power consumption substantially without impairing the …

Supply voltage reduction with process scaling has made the design of analog, RF and
mixed mode circuits increasingly difficult. In this paper, we present the design of an ultra-low …

The IEEE 802.11 a standard uses orthogonal frequency division multiplexing (OFDM) to
allow high data rates in multipath WLAN environments. The high peak-to-average power …

A 2.45 GHz fully differential CMOS power amplifier (PA) with high efficiency and linearity is
presented. For this work, a 0.18-/spl mu/m standard CMOS process with Cu-metal is …

One increasingly popular application for wireless systems are wireless local area networks
(WLANs) of computer sys tems. Prominent in the field of home and business, wireless …

The drive for cost reduction has led to the use of CMOS technology in the implementation of
highly integrated radios. This paper presents a single-chip 5-GHz fully integrated direct …

A fully integrated CMOS direct-conversion 5-GHz transceiver with automatic frequency
control is implemented in a 0.18-μm digital CMOS process and housed in an LPCC-48 …

This brief presents a baseband automatic gain control (AGC) circuit for an IEEE 802.11 a
wireless local area network (WLAN) direct conversion receiver. The whole receiver is to be …

Methods and systems for calibrating a multi-mode, multi-standard transmitter and receiver
are disclosed. Aspects of the method may include configuring calibration paths in a …

A linearization technique is proposed in which low-frequency second-order-intermodulation
(IM 2) is generated and injected to suppress the third-order intermodulation (IM 3). The …