The timing-convergence problem arises because estimations made during logic synthesis
may not be met during physical design. In this paper, an efficient rewiring engine is …

As CMOS technologies enter nanometer scales, maintaining the microprocessor reliability
becomes a major design challenge. In particular, accelerated transistor aging is a serious …

In this paper, a computer-aided design system for CMOS VLSI circuit hot-carrier reliability
estimation and redesign is presented. The system first simulates a circuit to determine the …

In this paper we describe a hot-carrier and oxide reliability simulator, iProbe-d. In this
program, a probabilistic timing approach is employed to find the most susceptible devices to …

The rapid advances in semiconductor manufacturing technology have created tough
reliability problems. Failure mechanisms such as hot-carrier effect, dielectric breakdown …

To help ensure availability of the system in the event of processor and/or disk failures, the
Gamma database uses an availability technique termed chained declustering. Like …

As semiconductor devices enter the deep sub-micron era, reliability has become a major
issue and challenge in VLSI design. Among all the failure mechanisms, hot-carrier effect is …

Progressive technology scaling raises the need for efficient VLSI design methods facing the
increasing vulnerability to permanent physical defects, while considering power efficiency of …

This paper presents a new aged timing simulation methodology that can be used for hot-
carrier reliability assurance of VLSI. This methodology consists of a compact model and a …

Since electronics started to scale down, a growing concern about the reliability of these
electronic devices has emerged. At the same time, the increased demand for high …