Processing-in-memory: A workload-driven perspective

S Ghose, A Boroumand, JS Kim… - IBM Journal of …, 2019 - ieeexplore.ieee.org
Many modern and emerging applications must process increasingly large volumes of data.
Unfortunately, prevalent computing paradigms are not designed to efficiently handle such …

Memory persistency

S Pelley, PM Chen, TF Wenisch - ACM SIGARCH Computer Architecture …, 2014 - dl.acm.org
Emerging nonvolatile memory technologies (NVRAM) promise the performance of DRAM
with the persistence of disk. However, constraining NVRAM write order, necessary to ensure …

Foundations of the C++ concurrency memory model

HJ Boehm, SV Adve - ACM SIGPLAN Notices, 2008 - dl.acm.org
Currently multi-threaded C or C++ programs combine a single-threaded programming
language with a separate threads library. This is not entirely sound [7]. We describe an effort …

Reactive NUCA: near-optimal block placement and replication in distributed caches

N Hardavellas, M Ferdman, B Falsafi… - Proceedings of the 36th …, 2009 - dl.acm.org
Increases in on-chip communication delay and the large working sets of server and scientific
workloads complicate the design of the on-chip last-level cache for multicore processors …

CoNDA: Efficient cache coherence support for near-data accelerators

A Boroumand, S Ghose, M Patel, H Hassan… - Proceedings of the 46th …, 2019 - dl.acm.org
Specialized on-chip accelerators are widely used to improve the energy efficiency of
computing systems. Recent advances in memory technology have enabled near-data …

Delegated persist ordering

A Kolli, J Rosen, S Diestelhorst, A Saidi… - 2016 49th Annual …, 2016 - ieeexplore.ieee.org
Systems featuring a load-store interface to persistent memory (PM) are expected soon,
making in-memory persistent data structures feasible. Ensuring persistent data structure …

[图书][B] A primer on memory consistency and cache coherence

V Nagarajan, DJ Sorin, MD Hill, DA Wood - 2020 - library.oapen.org
Many modern computer systems, including homogeneous and heterogeneous architectures,
support shared memory in hardware. In a shared memory system, each of the processor …

Spatial memory streaming

S Somogyi, TF Wenisch, A Ailamaki, B Falsafi… - ACM SIGARCH …, 2006 - dl.acm.org
Prior research indicates that there is much spatial variation in applications' memory access
patterns. Modern memory systems, however, use small fixed-size cache blocks and as such …

BulkSC: Bulk enforcement of sequential consistency

L Ceze, J Tuck, P Montesinos, J Torrellas - Proceedings of the 34th …, 2007 - dl.acm.org
While Sequential Consistency (SC) is the most intuitive memory consistency model and the
one most programmers likely assume, current multiprocessors do not support it. Instead …

Delorean: Recording and deterministically replaying shared-memory multiprocessor execution ef? ciently

P Montesinos, L Ceze, J Torrellas - ACM SIGARCH Computer …, 2008 - dl.acm.org
Support for deterministic replay of multithreaded execution can greatly help in finding
concurrency bugs. For highest effectiveness, replay schemes should (i) record at production …