Brim: Bistable resistively-coupled Ising machine

R Afoakwa, Y Zhang, UKR Vengalam… - … Symposium on High …, 2021 - ieeexplore.ieee.org
Physical Ising machines rely on nature to guide a dynamical system towards an optimal
state which can be read out as a heuristical solution to a combinatorial optimization problem …

Real-time detection of power analysis attacks by machine learning of power supply variations on-chip

D Utyamishev, I Partin-Vaisband - IEEE Transactions on …, 2018 - ieeexplore.ieee.org
Reliably and power efficiently securing integrated systems against advanced power analysis
attacks (PAAs) is a significant design challenge in modern integrated circuits. Power …

Hardware footprints of S-box in lightweight symmetric block ciphers for IoT and CPS information security systems

A Prathiba, VSK Bhaaskaran - Integration, 2019 - Elsevier
The hardware footprint for S-box specification in lightweight block cipher as appropriate to
IoT and CPS information security systems is presented in this paper. The S-box Boolean …

High-throughput low-area design of AES using constant binary matrix-vector multiplication

H Lee, Y Paik, J Jun, Y Han, SW Kim - Microprocessors and Microsystems, 2016 - Elsevier
In spite of many outstanding studies, the hardware implementation of Advanced Encryption
Standard (AES) algorithm is still challenging because of recurrent computations in Galois …

Qubrim: A CMOS compatible resistively-coupled Ising machine with quantized nodal interactions

Y Zhang, UKR Vengalam, A Sharma, M Huang… - Proceedings of the 41st …, 2022 - dl.acm.org
Physical Ising machines have been shown to solve combinatoric optimization problems with
orders-of-magnitude improvements in speed and energy efficiency o ver v on N eumann …

A 45nm high-throughput and low latency aes encryption for real-time applications

PK Dong, HK Nguyen, XT Tran - 2019 19th International …, 2019 - ieeexplore.ieee.org
In this paper, we propose a high-throughput and low-latency AES architecture for wideband
and real-time applications such as surveillance cameras, video conference, motion …

Analog-inspired hardware security: A low-energy solution for IoT trusted communications

S Ellicott, M Kines, W Khalil, Y Qi… - 2021 IEEE 34th …, 2021 - ieeexplore.ieee.org
With the proliferation of connected internet of things (IoT) devices, trusted communications
between such de-vices is an increasing concern. While researchers have spent significant …

A 1800μm2, 953Gbps/W AES Accelerator for IoT Applications in 40nm CMOS

J Lan, VP Nambiar, MM Wong, F Li… - … on Circuits and …, 2022 - ieeexplore.ieee.org
A compact and energy-efficient AES accelerator for area and power-constrained IoT
applications was fabricated in a 40nm CMOS process. By eliminating the need of …

Enabling Supervised and Unsupervised Learning for EDA and Cybersecurity in VLSI Systems

D Utyamishev - 2024 - search.proquest.com
Modern integrated circuits (ICs) comprise billions (eg, in a single CPU processor) to trillions
(eg, in a state-of-the-art wafer-scale Cerebras accelerator) of transistors on a single chip. To …

Ultra-High-Throughput Multi-Core AES Encryption Hardware Architecture

PK Dong, HK Nguyen, FA Hussin… - VNU Journal of Science …, 2021 - jcsce.vnu.edu.vn
Security issues in high-speed data transfer between devices are always a big challenge. On
the other hand, new data transfer standards such as IEEE P802. 3bs 2017 stipulate the …