Near-Data-Processing (NDP) architectures present a promising way to alleviate data
movement costs and can provide significant performance and energy benefits to parallel …

While scalable coherence has been extensively studied in the context of general purpose
chip multiprocessors (CMPs), GPU architectures present a new set of challenges …

Energy harvesting system has huge potential to enable battery-less Internet of Things (IoT)
services. However, it has been designed without a cache due to the difficulty of crash …

Cache coherence is ubiquitous in shared memory multiprocessors because it provides a
simple, high performance memory abstraction to programmers. Recent work suggests …

Graphics processing units (GPUs) have specialized throughput-oriented memory systems
optimized for streaming writes with scratchpad memories to capture locality explicitly …

Coherent shared virtual memory (cSVM) is highly coveted for heterogeneous architectures
as it will simplify programming across different cores and manycore accelerators. In this …

Traditional directory coherence protocols are designed for the strictest consistency model,
sequential consistency (SC). When they are used for chip multiprocessors (CMPs) that …

A coherent global address space in a distributed system enables shared memory
programming in a much larger scale than a single multicore or a single SMP. Without …

The heterogeneous-race-free (HRF) memory model has been embraced by the
Heterogeneous System Architecture (HSA) Foundation and OpenCL TM because it clearly …

Use case point (UCP) method has been proposed to estimate software development effort in
early phase of software project and used in a lot of software organizations. Intuitively, UCP is …