A review of advances in pixel detectors for experiments with high rate and radiation

M Garcia-Sciveres, N Wermes - Reports on Progress in Physics, 2018 - iopscience.iop.org
The large Hadron collider (LHC) experiments ATLAS and CMS have established hybrid
pixel detectors as the instrument of choice for particle tracking and vertexing in high rate and …

Test results and prospects for RD53A, a large scale 65 nm CMOS chip for pixel readout at the HL-LHC

L Gaioni, RD53 Collaboration - … Methods in Physics Research Section A …, 2019 - Elsevier
The CERN RD53 collaboration was founded to tackle the extraordinary challenges
associated with the design of pixel readout chips for the innermost layers of particle trackers …

Comparative evaluation of analogue front-end designs for the CMS Inner Tracker at the High Luminosity LHC

W Adam, T Bergauer, D Blöch… - Journal of …, 2021 - iopscience.iop.org
A: The CMS Inner Tracker, made of silicon pixel modules, will be entirely replaced prior to
the start of the High Luminosity LHC period. One of the crucial components of the new Inner …

Hybrid pixel readout integrated circuits

M Garcia-Sciveres - Nuclear Instruments and Methods in Physics Research …, 2023 - Elsevier
This is one of several articles in a special volume devoted to micro-electronics in the field of
High Energy Particle Physics, reviewing readout integrated circuits for hybrid pixel detectors …

A PVT power immune compact 65 nm CMOS CSP design with a leakage current compensation feedback for CdZnTe/CdTe sensors dedicated to PET applications

P Yannick Hertz, F Kamdem Jerome… - … journal of circuit …, 2022 - Wiley Online Library
Power consumption and image resolution are the major concerned while designing modern
readout integrated circuits (ROICs) of Cadmium‐Telluride (CdTe)/Cadmium‐Zinc‐Telluride …

Ionizing radiation effects on the noise of 65 nm CMOS transistors for pixel sensor readout at extreme total dose levels

V Re, L Gaioni, M Manghisoni, L Ratti… - … on Nuclear Science, 2017 - ieeexplore.ieee.org
This paper is focused on the study of the noise performance of 65 nm CMOS transistors at
extremely high total ionizing dose (TID) levels of the order of several hundreds of Mrad (SiO …

[HTML][HTML] CMOS readout FEE based TV-BLR module for CdZnTe pixel detectors in high count rate applications

PY Hertz, FK Jerome, NSL Vanessa… - Ain Shams Engineering …, 2024 - Elsevier
In this study, a time-variant baseline restorer (TV-BLR) circuit was designed and
implemented to address the poor frequency selectivity issue in the shaping units of most …

A prototype of pixel readout ASIC in 65 nm CMOS technology for extreme hit rate detectors at HL-LHC

A Paternò, L Pacher, E Monteil, F Loddo… - Journal of …, 2017 - iopscience.iop.org
This paper describes a readout ASIC prototype designed by the CHIPIX65 project, part of
RD53, for a pixel detector at HL-LHC. A 64× 64 matrix of 50× 50μm 2 pixels is realised. A …

Design of analog front-ends for the RD53 demonstrator chip

L Gaioni, FE Rarbi, N Demaria, G Della Casa… - PoS, 2017 - cds.cern.ch
The RD53 collaboration is developing a large scale pixel front-end chip, which will be a tool
to evaluate the performance of 65 nm CMOS technology in view of its application to the …

A synchronous analog very front-end in 65 nm CMOS with local fast ToT encoding for pixel detectors at HL-LHC

E Monteil, L Pacher, A Paternò, N Demaria… - Journal of …, 2017 - iopscience.iop.org
This work describes the design, in 65 nm CMOS, of a very compact, low power, low
threshold synchronous analog front-end for pixel detectors at HL-LHC. Threshold trimming is …