A survey of techniques for architecting and managing asymmetric multicore processors

S Mittal - ACM Computing Surveys (CSUR), 2016 - dl.acm.org
To meet the needs of a diverse range of workloads, asymmetric multicore processors
(AMPs) have been proposed, which feature cores of different microarchitecture or ISAs …

Paragon: QoS-aware scheduling for heterogeneous datacenters

C Delimitrou, C Kozyrakis - ACM SIGPLAN Notices, 2013 - dl.acm.org
Large-scale datacenters (DCs) host tens of thousands of diverse applications each day.
However, interference between colocated workloads and the difficulty to match applications …

Addressing shared resource contention in multicore processors via scheduling

S Zhuravlev, S Blagodurov, A Fedorova - ACM Sigplan Notices, 2010 - dl.acm.org
Contention for shared resources on multicore processors remains an unsolved problem in
existing systems despite significant research efforts dedicated to this problem in the past …

Scheduling heterogeneous multi-cores through performance impact estimation (PIE)

K Van Craeynest, A Jaleel, L Eeckhout… - ACM SIGARCH …, 2012 - dl.acm.org
Single-ISA heterogeneous multi-core processors are typically composed of small (eg, in-
order) power-efficient cores and big (eg, out-of-order) high-performance cores. The …

E3:{Energy-Efficient} microservices on {SmartNIC-Accelerated} servers

M Liu, S Peter, A Krishnamurthy… - 2019 USENIX Annual …, 2019 - usenix.org
We investigate the use of SmartNIC-accelerated servers to execute microservice-based
applications in the data center. By offloading suitable microservices to the SmartNIC's low …

Bias scheduling in heterogeneous multi-core architectures

D Koufaty, D Reddy, S Hahn - … of the 5th European conference on …, 2010 - dl.acm.org
Heterogeneous architectures that integrate a mix of big and small cores are very attractive
because they can achieve high single-threaded performance while enabling high …

Survey of energy-cognizant scheduling techniques

S Zhuravlev, JC Saez, S Blagodurov… - … on Parallel and …, 2012 - ieeexplore.ieee.org
Execution time is no longer the only metric by which computational systems are judged. In
fact, explicitly sacrificing raw performance in exchange for energy savings is becoming a …

Evaluation of the intel® core™ i7 turbo boost feature

J Charles, P Jassi, NS Ananth, A Sadat… - 2009 IEEE …, 2009 - ieeexplore.ieee.org
The Intel® Core™ i7 processor code named Nehalem has a novel feature called Turbo
Boost which dynamically varies the frequencies of the processor's cores. The frequency of a …

Resource-conscious scheduling for energy efficiency on multicore processors

A Merkel, J Stoess, F Bellosa - … of the 5th European conference on …, 2010 - dl.acm.org
In multicore systems, shared resources such as caches or the memory subsystem can lead
to contention between applications running on different cores, entailing reduced …

ibench: Quantifying interference for datacenter applications

C Delimitrou, C Kozyrakis - 2013 IEEE international symposium …, 2013 - ieeexplore.ieee.org
Interference between co-scheduled applications is one of the major reasons that causes
modern datacenters (DCs) to operate at low utilization. DC operators traditionally side-step …