High performance cache replacement using re-reference interval prediction (RRIP)

A Jaleel, KB Theobald, SC Steely Jr… - ACM SIGARCH computer …, 2010 - dl.acm.org
Practical cache replacement policies attempt to emulate optimal replacement by predicting
the re-reference interval of a cache block. The commonly used LRU replacement policy …

Back to the future: Leveraging Belady's algorithm for improved cache replacement

A Jain, C Lin - ACM SIGARCH Computer Architecture News, 2016 - dl.acm.org
Belady's algorithm is optimal but infeasible because it requires knowledge of the future. This
paper explains how a cache replacement algorithm can nonetheless learn from Belady's …

SHiP: Signature-based hit predictor for high performance caching

CJ Wu, A Jaleel, W Hasenplaugh, M Martonosi… - Proceedings of the 44th …, 2011 - dl.acm.org
The shared last-level caches in CMPs play an important role in improving application
performance and reducing off-chip memory bandwidth requirements. In order to use LLCs …

Sampling dead block prediction for last-level caches

SM Khan, Y Tian, DA Jimenez - 2010 43rd Annual IEEE/ACM …, 2010 - ieeexplore.ieee.org
Last-level caches (LLCs) are large structures with significant power requirements. They can
be quite inefficient. On average, a cache block in a 2MB LRU-managed LLC is dead 86% of …

Perceptron learning for reuse prediction

E Teran, Z Wang, DA Jiménez - 2016 49th Annual IEEE/ACM …, 2016 - ieeexplore.ieee.org
The disparity between last-level cache and memory latencies motivates the search for
efficient cache management policies. Recent work in predicting reuse of cache blocks …

Improving cache management policies using dynamic reuse distances

N Duong, D Zhao, T Kim, R Cammarota… - 2012 45Th annual …, 2012 - ieeexplore.ieee.org
Cache management policies such as replacement, bypass, or shared cache partitioning
have been relying on data reuse behavior to predict the future. This paper proposes a new …

The evicted-address filter: A unified mechanism to address both cache pollution and thrashing

V Seshadri, O Mutlu, MA Kozuch… - Proceedings of the 21st …, 2012 - dl.acm.org
Off-chip main memory has long been a bottleneck for system performance. With increasing
memory pressure due to multiple on-chip cores, effective cache utilization is important. In a …

Designing a cost-effective cache replacement policy using machine learning

S Sethumurugan, J Yin, J Sartori - 2021 IEEE International …, 2021 - ieeexplore.ieee.org
Extensive research has been carried out to improve cache replacement policies, yet
designing an efficient cache replacement policy that incurs low hardware overhead remains …

Multiperspective reuse prediction

DA Jiménez, E Teran - Proceedings of the 50th Annual IEEE/ACM …, 2017 - dl.acm.org
The disparity between last-level cache and memory latencies motivates the search for
efficient cache management policies. Recent work in predicting reuse of cache blocks …

CAWA: Coordinated warp scheduling and cache prioritization for critical warp acceleration of GPGPU workloads

SY Lee, A Arunkumar, CJ Wu - ACM SIGARCH Computer Architecture …, 2015 - dl.acm.org
The ubiquity of graphics processing unit (GPU) architectures has made them efficient
alternatives to chip-multiprocessors for parallel workloads. GPUs achieve superior …