Modeling and verifying hierarchical real-time systems using stateful timed CSP

J Sun, Y Liu, JS Dong, Y Liu, L Shi… - ACM Transactions on …, 2013 - dl.acm.org
Modeling and verifying complex real-time systems are challenging research problems. The
de facto approach is based on Timed Automata, which are finite state automata equipped …

Timed automata patterns

JS Dong, P Hao, S Qin, J Sun… - IEEE Transactions on …, 2008 - ieeexplore.ieee.org
Timed Automata have proven to be useful for specification and verification of real-time
systems. System design using Timed Automata relies on explicit manipulation of clock …

Verification of computation orchestration via timed automata

JS Dong, Y Liu, J Sun, X Zhang - … ICFEM 2006, Macao, China, November 1 …, 2006 - Springer
Recently, a promising programming model called Orc has been proposed to support a
structured way of orchestrating distributed web services. Orc is intuitive because it offers …

Verifying stateful timed CSP using implicit clocks and zone abstraction

J Sun, Y Liu, JS Dong, X Zhang - … Methods ICFEM 2009, Rio de Janeiro …, 2009 - Springer
In this work, we study model checking of compositional real-time systems. A system is
modeled using mutable data variables as well as a compositional timed process. Instead of …

A reasoning method for timed CSP based on constraint solving

JS Dong, P Hao, J Sun, X Zhang - International Conference on Formal …, 2006 - Springer
Timed CSP extends CSP by introducing a capability to quantify temporal aspects of
sequencing and synchronization. It is a powerful language to model real time reactive …

[PDF][PDF] Model checking concurrent and real-time systems: the PAT approach

L Yang - 2009 - core.ac.uk
The design and verification of concurrent and real-time systems are notoriously difficult
problems. Among the software validation techniques, model checking approach has been …

The formal classification and verification of Simpson's 4-slot asynchronous communication mechanism

N Henderson, SE Paynter - FME 2002: Formal Methods—Getting IT Right …, 2002 - Springer
This paper critiques and extends Lamport's taxonomy of asynchronous registers,[8],[9]. This
extended taxonomy is used to characterise Simpson's 4-slot asynchronous communication …

Bounded model checking of compositional processes

J Sun, Y Liu, JS Dong, J Sun - 2008 2nd IFIP/IEEE International …, 2008 - ieeexplore.ieee.org
Verification techniques like SAT-based bounded model checking have been successfully
applied to a variety of system models. Applying bounded model checking to compositional …

Towards an integrated model checker for railway signalling data

M Huber, S King - FME 2002: Formal Methods—Getting IT Right …, 2002 - Springer
Abstract Geographic Data for Solid State Interlocking (SSI) systems detail site-specific
behaviour of the railway interlocking. This report demonstrates how five vital safety …

Towards verification of computation orchestration

JS Dong, Y Liu, J Sun, X Zhang - Formal Aspects of Computing, 2014 - Springer
Recently, a promising programming model called Orc has been proposed to support a
structured way of orchestrating distributed Web Services. Orc is intuitive because it offers …