Embodiments of the present disclosure provide a shift register unit and a driving method
thereof, a gate driving circuit and a display apparatus. The shift register unit includes a reset …

A semiconductor memory device comprises a memory string that includes a plurality of
memory cells electrically connected in series, the memory cells including first to fourth …

US10535405B2 - Memory device having common source lines coupled to memory blocks
respectively and operating method thereof - Google Patents US10535405B2 - Memory device …

A memory device includes first and second memory strings, first and second word lines and
a controller. The first memory string includes first and second memory cells, a first select …

A memory device includes first and second memory strings, first and second word lines and
a controller. The first memory string includes first and second memory cells, a first select …

A memory device may include a plurality of memory blocks and one or more peripheral
circuits. Each of the plurality of memory blocks may include a plurality of cell strings. The one …

(57) ABSTRACT A semiconductor memory device comprises a memory string that includes a
plurality of memory cells electrically con nected in series, the memory cells including first to …

A memory device includes a memory cell block including a plurality of memory cells. The
memory device also includes peripheral circuits configured to perform an erase operation by …

A memory device includes first and second memory strings, first and second word lines and
a controller. The first memory string includes first and second memory cells, a first select …

G11C16/0433—Erasable programmable read-only memories electrically programmable
using variable threshold transistors, eg FAMOS comprising cells containing floating gate …