Emvs: Embedded multi vector-core system
With the increase in the density and performance of digital electronics, the demand for a
power-efficient high-performance computing (HPC) system has been increased for …
power-efficient high-performance computing (HPC) system has been increased for …
Tensor-based hardware accelerator including a scalar-processing unit
SK Reinhardt, IIJA MAYER, D Zhang - US Patent 10,997,116, 2021 - Google Patents
A computing system is described herein that expedites deep neural network (DNN)
operations or other processing operations using a hardware accelerator. The hardware …
operations or other processing operations using a hardware accelerator. The hardware …
[PDF][PDF] Gnu compiler collection backend port for the integral parallel architecture
R HOBINCU, V CODREANU… - UPB Scientific Bulletin …, 2011 - academia.edu
This paper presents the process of porting the GCC compiler offered by the Free Software
Foundation, for the hybrid Integral Parallel Architecture composed of an interleaved …
Foundation, for the hybrid Integral Parallel Architecture composed of an interleaved …
Dynamic power management through adaptive task scheduling for multi-threaded SIMD processors
L Petrica - 2012 10th International Symposium on Electronics …, 2012 - ieeexplore.ieee.org
Power management is one of the most important issues in computer architecture today.
Devices often operate on the edge of their thermal envelope and system designers must …
Devices often operate on the edge of their thermal envelope and system designers must …
[PDF][PDF] A SIMD Approach to Thread Matching for Interleaved Multithreading
L PETRICĂ - SCIENCE AND TECHNOLOGY, 2012 - romjist.ro
Interleaved multithreading processors offer improved performance and power efficiency in a
multithreading environment compared to standard CPUs by allowing multiple threads to …
multithreading environment compared to standard CPUs by allowing multiple threads to …