Design methodology for intelligent technical systems
J Gausemeier, FJ Rammig, W Schäfer - Lecture Notes in Mechanical …, 2014 - Springer
The Collaborative Research Centre 614" Self-Optimizing Concepts and Structures in
Mechanical Engineering", funded from 2002 to 2013 by the German Research Foundation …
Mechanical Engineering", funded from 2002 to 2013 by the German Research Foundation …
FUSE: Front-end user framework for O/S abstraction of hardware accelerators
A Ismail, L Shannon - 2011 IEEE 19th annual international …, 2011 - ieeexplore.ieee.org
SoCs can be implemented on a single FPGA, offering designers a unique opportunity for
Embedded Systems. Instead of defining a fixed architecture early in the design process, the …
Embedded Systems. Instead of defining a fixed architecture early in the design process, the …
[PDF][PDF] Real-time traffic monitoring.
Traffic statistics desired by road engineers and planners, and" traffic warning" systems
demand real-time performance which precludes the use of batch processing. We apply …
demand real-time performance which precludes the use of batch processing. We apply …
Parallel hardware hypervisor for virtualizing application-specific supercomputers
7. B-1 (P1) sends message to Bo (not mapped) Cache miss handled by owner P3 containing
A1 is chosen for pre-empting Ownero asks owner to undo (A1-) P3) map (A1-) P3) entry in …
A1 is chosen for pre-empting Ownero asks owner to undo (A1-) P3) map (A1-) P3) entry in …
Programming reconfigurable heterogeneous computing clusters using mpi with transpilation
With the slowdown of Moore's law and the stop of Dennard scaling, energy efficiency of
compute hardware translates to compute power. Therefore, High-Performance Computing …
compute hardware translates to compute power. Therefore, High-Performance Computing …
Internal and external bitstream relocation for partial dynamic reconfiguration
S Corbetta, M Morandi, M Novati… - … Transactions on Very …, 2009 - ieeexplore.ieee.org
The research described in this paper shows how the runtime relocation of a reconfigurable
component can be obtained using a system component that is able to update the bitstream …
component can be obtained using a system component that is able to update the bitstream …
Bebot: A modular mobile miniature robot platform supporting hardware reconfiguration and multi-standard communication
S Herbrechtsmeier, U Witkowski, U Rückert - Progress in Robotics: FIRA …, 2009 - Springer
Mobile robots become more and more important in current research and education.
Especially small'on the table'experiments attract interest, because they need no additional or …
Especially small'on the table'experiments attract interest, because they need no additional or …
A design methodology for communication infrastructures on partially reconfigurable FPGAs
J Hagemeyer, B Kettelhoit, M Koester… - … Conference on Field …, 2007 - ieeexplore.ieee.org
The ability of partial reconfiguration of today's FPGAs allows the exchange of dynamic
system components at run-time, which enables the realization of self-reconfigurable …
system components at run-time, which enables the realization of self-reconfigurable …
A highly flexible reconfigurable system on a Xilinx FPGA
T Drahoňovský, M Rozkovec… - … Computing and FPGAs …, 2014 - ieeexplore.ieee.org
Runtime reconfigurable systems become more prevalent in numerous practical applications
because these systems have a great flexibility. This paper presents a reconfigurable system …
because these systems have a great flexibility. This paper presents a reconfigurable system …
High performance context switching for virtualized FPGA accelerators
KY Cheng, DA Roberts, WC Brantley - US Patent 10,540,200, 2020 - Google Patents
US10540200B2 - High performance context switching for virtualized FPGA accelerators - Google
Patents US10540200B2 - High performance context switching for virtualized FPGA accelerators …
Patents US10540200B2 - High performance context switching for virtualized FPGA accelerators …