Review of the nanoscale FinFET device for the applications in nano-regime

SU Haq, VK Sharma - Current Nanoscience, 2023 - ingentaconnect.com
Background: The insatiable need for low-power and high-performance integrated circuit (IC)
results in the development of alternative options for metal oxide semiconductor field effect …

Intelligent signal gating-aware energy-efficient 8-bit FinFET arithmetic and logic unit

D Ajitha, M Chandra Sekhar Reddy - Circuits, Systems, and Signal …, 2022 - Springer
A FinFET-based 8-bit low-power arithmetic and logic unit (ALU) with full-swing 9-transistor
GDI-hybrid full adder has been presented in this research paper. An intelligent signal gating …

[图书][B] MOSFET-Developments and Trends: Developments and Trends

Y Tu, R Abd-Alhameed, A Rayit - 2024 - books.google.com
This book covers a wide range of the latest innovations in MOSFETs, including discussions
of developments in various important mainstream MOSFETs. It covers modeling and …

1T-DRAM Cell with Different FET Technologies for Low Power Application

D Addala, SK Sinha, MC Gadiparthi… - Wireless Personal …, 2023 - Springer
DRAM's are essential for memory-based electronics devices and the usage of RAM is
increasing day by day to reach the user's expectation the products are get designed based …

[HTML][HTML] MOSFET on the Horizon: What's New and What's Next

A Dixit - 2024 - intechopen.com
This chapter mainly enlighten about the development and trends of the field effect transistors
(FETs) in the nanoelectronics industries. According to Moore's law, the number of transistors …

Performance Analysis of Montgomery Multiplier using 32nm CNTFET Technology

N Mathan, S Jayashri, NE Alias… - Indonesian Journal of …, 2019 - section.iaesonline.com
In VLSI design vacillating the parameters results in variation of critical factors like area,
power and delay. The dominant sources of power dissipation in digital systems are the …

[PDF][PDF] Scalable low-power 1-bit hybrid full adder for fast computation using Pass Transistors.

R Singh, AV Navnath, BK Lodh - viit.ac.in
Using pass transistor logic, we constructed a 1-bit full adder circuit in this study. High-speed
technology uses pass transistor logic, and it is simple to construct the fundamental gate …

[PDF][PDF] Implementation of 1-bit Full Adder Circuit Using Pass Transistor Logic

J Yaminikumari, GB Gupta - academia.edu
In this work, we have implemented 1-bit Full Adder Circuit using Pass Transistor Logic. Pass
Transistor Logic is used for high-speed technology and is easy to build the basic gate …

[PDF][PDF] Analysis of FinFET and CNTFET based Hybrid CMOS Full Adder Circuit

H Gehlot, MEA Lodhi - 2022 - academia.edu
In the world of IC, the technology scales down to 32nm or below and CMOS has lost its
recommendation during scaling beyond 32nm due to high power consumption and high …

Comparative Analysis of MOSFET and FinFET Based Full Protected Soft Error Tolerant Latch

HI Reefat, SS Mehjabin - 2020 11th International Conference …, 2020 - ieeexplore.ieee.org
Average power and delay are two essential aspects of measuring device performance in
integrated circuits. The tradeoff between the two for a full protected soft error tolerant latch …