Recently, the threat of Android malware is spreading rapidly, especially those repackaged
Android malware. Although understanding Android malware using dynamic analysis can …

In this paper, a novel algorithm for creating efficient reduced-order macromodels from
massively coupled interconnect structures is described. The new algorithm addresses the …

Verification of the on-die power grid is a key step in the design of complex high-performance
integrated circuits. For the very large grids in modern designs, incremental verification is …

We discuss the reduction of large-scale circuit equations with many terminals. Usual model
order reduction (MOR) methods assume a small number of inputs and outputs. This is no …

This chapter deals with the application of model order reduction (MOR) in the area of
microelectronics. It mainly focuses on the diligent efforts of the MOR community in …

Abstract Parametrized Model Order Reduction (PMOR) methods reduce the full equations
for large parametric networks into a reduced number of parametrized equations. The …

An efficient clustering scheme for macromodeling of massively coupled interconnect
structures is presented. The proposed method addresses the issue of dense reduced …

Purpose–This paper aims to present a method for the efficient reduction of networks
modelling parasitic couplings in very-large-scale integration (VLSI) circuits …

Many research and development studies use virtual buildings represented by building
thermal models at a detailed level. Such models need relatively long computation times for …

In this paper a method for the efficient reduction network models of parasitic couplings in
modern integrated circuits is presented. The focus lies on the disturbance of the analog part …