Y Han, W Liu, X Zhang, X Wang, X Liu, Y Liu - Sensors, 2022 - mdpi.com
This paper proposes a wide dynamic range (DR) and high-resolution discrete-time (DT) 2- order 4-bit sigma-delta modulator with a novel dynamic-modulated scaling-down (DM-SD) …
Q Ren, X Sun, X Fu, S Zhang, Y Yuan… - Journal of …, 2023 - iopscience.iop.org
Epilepsy is a common neurological disorder that occurs at all ages. Epilepsy not only brings physical pain to patients, but also brings a huge burden to the lives of patients and their …
This paper presents an implementation of a 14-bit 2.5 MS/s differential Successive- Approximation-Register (SAR) analog-to-digital converter (ADC) to be used for sensing …
D Yan, X Zhang, Y Xiao, X Yu, S Peng, S Li… - Microelectronics …, 2025 - Elsevier
This paper presents a 12-bit, 4.5 MS/s synchronous SAR ADC implemented in SMIC's 130- nm CMOS technology. It features a novel method for internal common-mode (V cm) …
Y Mekkattillam, S Mohapatra, NR Mohapatra - International Symposium on …, 2019 - Springer
This work presents the design and calibration of an ultra-low power 14-bit 10 KS/s fully differential split SAR ADC. The integrated transient response of the ADC shows a settling …
This work presents the detailed design of a Successive Approximation Analog to Digital Data Converter (SAR ADC) using bulk 180 nm CMOS IC technology. The focus of the study …
R Prajapati, IA Emerson - International Journal of Neuroscience, 2022 - Taylor & Francis
Objectives The human brain is one of the most complicated biological structure in the entire universe. It is incredibly challenging to see how it functions, mainly during scatter-brain, and …
L Dong, Z Lan, X Gui, C He, Y Xin, K Li… - 2019 IEEE Asia Pacific …, 2019 - ieeexplore.ieee.org
This paper presents a multi-channel neural recording front end (FE) with orthogonal frequency chopping for neural recording applications by using a standard 0.18 μm CMOS …
MK Adimulam, MB Srinivas - Analog Integrated Circuits and Signal …, 2019 - Springer
In this paper, a novel, low power, 16-bit, 9.84 fJ/conv-step FOM, reconfigurable, hybrid SAR- sigma delta ADC is presented. The ADC has been designed and implemented with two …